Symbol: REGS
arch/alpha/include/asm/elf.h
114
#define ELF_CORE_COPY_REGS(DEST, REGS) \
arch/alpha/include/asm/elf.h
115
dump_elf_thread(DEST, REGS, current_thread_info());
arch/arm/probes/decode-arm.c
156
REGS(0, NOPC, 0, 0, 0)),
arch/arm/probes/decode-arm.c
163
REGS(0, 0, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
167
REGS(0, NOPC, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
174
REGS(NOPC, NOPC, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
190
REGS(NOPC, NOPC, NOPC, 0, NOPC)),
arch/arm/probes/decode-arm.c
196
REGS(NOPC, 0, NOPC, 0, NOPC)),
arch/arm/probes/decode-arm.c
202
REGS(NOPC, NOPC, NOPC, 0, NOPC)),
arch/arm/probes/decode-arm.c
213
REGS(NOPC, 0, NOPC, 0, NOPC)),
arch/arm/probes/decode-arm.c
220
REGS(NOPC, NOPC, NOPC, 0, NOPC)),
arch/arm/probes/decode-arm.c
233
REGS(NOPC, NOPC, NOPC, 0, NOPC)),
arch/arm/probes/decode-arm.c
245
REGS(NOPC, NOPC, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
268
REGS(NOPCWB, NOPCX, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
273
REGS(NOPCWB, NOPCX, 0, 0, 0)),
arch/arm/probes/decode-arm.c
277
REGS(NOPCWB, NOPC, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
283
REGS(NOPCWB, NOPC, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
287
REGS(NOPCWB, NOPC, 0, 0, 0)),
arch/arm/probes/decode-arm.c
293
REGS(NOPCWB, NOPC, 0, 0, 0)),
arch/arm/probes/decode-arm.c
312
REGS(ANY, 0, 0, 0, ANY)),
arch/arm/probes/decode-arm.c
317
REGS(0, ANY, 0, 0, ANY)),
arch/arm/probes/decode-arm.c
330
REGS(ANY, ANY, 0, 0, ANY)),
arch/arm/probes/decode-arm.c
337
REGS(NOPC, 0, NOPC, 0, NOPC)),
arch/arm/probes/decode-arm.c
342
REGS(0, NOPC, NOPC, 0, NOPC)),
arch/arm/probes/decode-arm.c
355
REGS(NOPC, NOPC, NOPC, 0, NOPC)),
arch/arm/probes/decode-arm.c
366
REGS(0, NOPC, 0, 0, 0)),
arch/arm/probes/decode-arm.c
389
REGS(ANY, 0, 0, 0, 0)),
arch/arm/probes/decode-arm.c
394
REGS(0, ANY, 0, 0, 0)),
arch/arm/probes/decode-arm.c
407
REGS(ANY, ANY, 0, 0, 0)),
arch/arm/probes/decode-arm.c
417
REGS(NOPC, NOPC, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
425
REGS(0, NOPC, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
432
REGS(0, NOPC, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
477
REGS(NOPC, NOPC, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
482
REGS(NOPC, NOPC, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
495
REGS(0, NOPC, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
504
REGS(NOPCX, NOPC, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
518
REGS(NOPC, NOPC, NOPC, 0, NOPC)),
arch/arm/probes/decode-arm.c
527
REGS(NOPC, 0, NOPC, 0, NOPC)),
arch/arm/probes/decode-arm.c
536
REGS(NOPC, NOPCX, NOPC, 0, NOPC)),
arch/arm/probes/decode-arm.c
540
REGS(NOPC, NOPC, NOPC, 0, NOPC)),
arch/arm/probes/decode-arm.c
545
REGS(0, NOPC, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
549
REGS(0, NOPC, 0, 0, 0)),
arch/arm/probes/decode-arm.c
553
REGS(0, NOPC, 0, 0, NOPCX)),
arch/arm/probes/decode-arm.c
573
REGS(NOPCWB, ANY, 0, 0, 0)),
arch/arm/probes/decode-arm.c
578
REGS(NOPCWB, ANY, 0, 0, 0)),
arch/arm/probes/decode-arm.c
583
REGS(NOPCWB, ANY, 0, 0, NOPC)),
arch/arm/probes/decode-arm.c
588
REGS(NOPCWB, ANY, 0, 0, NOPC)),
arch/arm/probes/decode-thumb.c
105
REGS(SP, 0, SP, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
114
REGS(SP, 0, NOPC, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
128
REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
139
REGS(NOSPPC, 0, 0, 0, 0)),
arch/arm/probes/decode-thumb.c
145
REGS(NOPC, 0, 0, 0, 0)),
arch/arm/probes/decode-thumb.c
150
REGS(0, 0, NOSPPC, 0, 0)),
arch/arm/probes/decode-thumb.c
167
REGS(SP, 0, NOPC, 0, 0)),
arch/arm/probes/decode-thumb.c
180
REGS(NOSPPC, 0, NOSPPC, 0, 0)),
arch/arm/probes/decode-thumb.c
192
REGS(PC, 0, NOSPPC, 0, 0)),
arch/arm/probes/decode-thumb.c
198
REGS(SP, 0, SP, 0, 0)),
arch/arm/probes/decode-thumb.c
204
REGS(NOPCX, 0, NOSPPC, 0, 0)),
arch/arm/probes/decode-thumb.c
209
REGS(0, 0, NOSPPC, 0, 0)),
arch/arm/probes/decode-thumb.c
216
REGS(NOSPPC, 0, NOSPPC, 0, 0)),
arch/arm/probes/decode-thumb.c
221
REGS(NOSPPC, 0, NOSPPC, 0, 0)),
arch/arm/probes/decode-thumb.c
225
REGS(0, 0, NOSPPC, 0, 0)),
arch/arm/probes/decode-thumb.c
229
REGS(NOSPPCX, 0, NOSPPC, 0, 0)),
arch/arm/probes/decode-thumb.c
248
REGS(0, 0, NOSPPC, 0, 0)),
arch/arm/probes/decode-thumb.c
295
REGS(NOPCX, 0, 0, 0, 0)),
arch/arm/probes/decode-thumb.c
301
REGS(NOPCX, 0, 0, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
337
REGS(PC, ANY, 0, 0, 0)),
arch/arm/probes/decode-thumb.c
345
REGS(NOPCX, ANY, 0, 0, 0)),
arch/arm/probes/decode-thumb.c
350
REGS(NOPCX, ANY, 0, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
357
REGS(PC, NOSPPCX, 0, 0, 0)),
arch/arm/probes/decode-thumb.c
373
REGS(NOPCX, NOSPPCX, 0, 0, 0)),
arch/arm/probes/decode-thumb.c
382
REGS(NOPCX, NOSPPCX, 0, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
401
REGS(0, 0, NOSPPC, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
474
REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
484
REGS(NOSPPC, 0, NOSPPC, 0, SAMEAS16)),
arch/arm/probes/decode-thumb.c
507
REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
523
REGS(NOSPPC, NOSPPCX, NOSPPC, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
54
REGS(NOPCWB, NOSPPC, NOSPPC, 0, 0)),
arch/arm/probes/decode-thumb.c
544
REGS(NOSPPC, NOSPPC, NOSPPC, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
59
REGS(NOSP, 0, 0, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
79
REGS(NOSPPC, 0, 0, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
85
REGS(NOPC, 0, 0, 0, NOSPPC)),
arch/arm/probes/decode-thumb.c
90
REGS(0, 0, NOSPPC, 0, NOSPPC)),
arch/hexagon/include/asm/elf.h
100
#define ELF_CORE_COPY_REGS(DEST, REGS) \
arch/hexagon/include/asm/elf.h
102
DEST.r0 = REGS->r00; \
arch/hexagon/include/asm/elf.h
103
DEST.r1 = REGS->r01; \
arch/hexagon/include/asm/elf.h
104
DEST.r2 = REGS->r02; \
arch/hexagon/include/asm/elf.h
105
DEST.r3 = REGS->r03; \
arch/hexagon/include/asm/elf.h
106
DEST.r4 = REGS->r04; \
arch/hexagon/include/asm/elf.h
107
DEST.r5 = REGS->r05; \
arch/hexagon/include/asm/elf.h
108
DEST.r6 = REGS->r06; \
arch/hexagon/include/asm/elf.h
109
DEST.r7 = REGS->r07; \
arch/hexagon/include/asm/elf.h
110
DEST.r8 = REGS->r08; \
arch/hexagon/include/asm/elf.h
111
DEST.r9 = REGS->r09; \
arch/hexagon/include/asm/elf.h
112
DEST.r10 = REGS->r10; \
arch/hexagon/include/asm/elf.h
113
DEST.r11 = REGS->r11; \
arch/hexagon/include/asm/elf.h
114
DEST.r12 = REGS->r12; \
arch/hexagon/include/asm/elf.h
115
DEST.r13 = REGS->r13; \
arch/hexagon/include/asm/elf.h
116
DEST.r14 = REGS->r14; \
arch/hexagon/include/asm/elf.h
117
DEST.r15 = REGS->r15; \
arch/hexagon/include/asm/elf.h
118
DEST.r16 = REGS->r16; \
arch/hexagon/include/asm/elf.h
119
DEST.r17 = REGS->r17; \
arch/hexagon/include/asm/elf.h
120
DEST.r18 = REGS->r18; \
arch/hexagon/include/asm/elf.h
121
DEST.r19 = REGS->r19; \
arch/hexagon/include/asm/elf.h
122
DEST.r20 = REGS->r20; \
arch/hexagon/include/asm/elf.h
123
DEST.r21 = REGS->r21; \
arch/hexagon/include/asm/elf.h
124
DEST.r22 = REGS->r22; \
arch/hexagon/include/asm/elf.h
125
DEST.r23 = REGS->r23; \
arch/hexagon/include/asm/elf.h
126
DEST.r24 = REGS->r24; \
arch/hexagon/include/asm/elf.h
127
DEST.r25 = REGS->r25; \
arch/hexagon/include/asm/elf.h
128
DEST.r26 = REGS->r26; \
arch/hexagon/include/asm/elf.h
129
DEST.r27 = REGS->r27; \
arch/hexagon/include/asm/elf.h
130
DEST.r28 = REGS->r28; \
arch/hexagon/include/asm/elf.h
131
DEST.r29 = pt_psp(REGS); \
arch/hexagon/include/asm/elf.h
132
DEST.r30 = REGS->r30; \
arch/hexagon/include/asm/elf.h
133
DEST.r31 = REGS->r31; \
arch/hexagon/include/asm/elf.h
134
DEST.sa0 = REGS->sa0; \
arch/hexagon/include/asm/elf.h
135
DEST.lc0 = REGS->lc0; \
arch/hexagon/include/asm/elf.h
136
DEST.sa1 = REGS->sa1; \
arch/hexagon/include/asm/elf.h
137
DEST.lc1 = REGS->lc1; \
arch/hexagon/include/asm/elf.h
138
DEST.m0 = REGS->m0; \
arch/hexagon/include/asm/elf.h
139
DEST.m1 = REGS->m1; \
arch/hexagon/include/asm/elf.h
140
DEST.usr = REGS->usr; \
arch/hexagon/include/asm/elf.h
141
DEST.p3_0 = REGS->preds; \
arch/hexagon/include/asm/elf.h
142
DEST.gp = REGS->gp; \
arch/hexagon/include/asm/elf.h
143
DEST.ugp = REGS->ugp; \
arch/hexagon/include/asm/elf.h
144
CS_COPYREGS(DEST,REGS); \
arch/hexagon/include/asm/elf.h
145
DEST.pc = pt_elr(REGS); \
arch/hexagon/include/asm/elf.h
146
DEST.cause = pt_cause(REGS); \
arch/hexagon/include/asm/elf.h
147
DEST.badva = pt_badva(REGS); \
arch/hexagon/include/asm/elf.h
91
#define CS_COPYREGS(DEST,REGS) \
arch/hexagon/include/asm/elf.h
93
DEST.cs0 = REGS->cs0;\
arch/hexagon/include/asm/elf.h
94
DEST.cs1 = REGS->cs1;\
arch/hexagon/include/asm/elf.h
97
#define CS_COPYREGS(DEST,REGS)
drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
211
WREG32_FIELD(UVD_CGC_GATE, REGS, 0);
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
640
WREG32_FIELD(UVD_CGC_GATE, REGS, 0);
drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h
43
#define REG(reg) (REGS)->offset.reg
drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h
45
#define FD(reg_field) (REGS)->shift.reg_field, (REGS)->mask.reg_field
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
304
REGS(a6xx_registers, 0, 0),
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
305
REGS(a660_registers, 0, 0),
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
306
REGS(a6xx_rb_rac_registers, REG_A6XX_RB_SUB_BLOCK_SEL_CNTL_CD, 0),
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
307
REGS(a6xx_rb_rbp_registers, REG_A6XX_RB_SUB_BLOCK_SEL_CNTL_CD, 9),
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
336
REGS(a6xx_ahb_registers, 0, 0);
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
339
REGS(a6xx_vbif_registers, 0, 0);
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
342
REGS(a6xx_gbif_registers, 0, 0);
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
398
REGS(a6xx_gmu_cx_registers, 0, 0),
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
399
REGS(a6xx_gmu_cx_rscc_registers, 0, 0),
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
400
REGS(a6xx_gmu_gx_registers, 0, 0),
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
403
static const struct a6xx_registers a6xx_gpucc_reg = REGS(a6xx_gmu_gpucc_registers, 0, 0);
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
404
static const struct a6xx_registers a621_gpucc_reg = REGS(a621_gmu_gpucc_registers, 0, 0);
drivers/media/i2c/ar0521.c
678
REGS(be(0x0112), be(0x0808)), /* 8-bit/8-bit mode */
drivers/media/i2c/ar0521.c
681
REGS(be(0x301E), be(0x00AA)),
drivers/media/i2c/ar0521.c
684
REGS(be(0x3042),
drivers/media/i2c/ar0521.c
688
REGS(be(0x30D2),
drivers/media/i2c/ar0521.c
694
REGS(be(0x30DA),
drivers/media/i2c/ar0521.c
700
REGS(be(0x30EE), be(0x1136)),
drivers/media/i2c/ar0521.c
701
REGS(be(0x30FA), be(0xFD00)), /* GPIO0 = flash, GPIO1 = shutter */
drivers/media/i2c/ar0521.c
702
REGS(be(0x3120), be(0x0005)), /* p1 dither enabled for 10bit mode */
drivers/media/i2c/ar0521.c
703
REGS(be(0x3172), be(0x0206)), /* txlo clk divider options */
drivers/media/i2c/ar0521.c
705
REGS(be(0x3180), be(0x9434)),
drivers/media/i2c/ar0521.c
707
REGS(be(0x31B0),
drivers/media/i2c/ar0521.c
712
REGS(be(0x31BC), be(0x068C)),
drivers/media/i2c/ar0521.c
713
REGS(be(0x31E0), be(0x0781)), /* Fuse/2DDC: enable 2ddc */
drivers/media/i2c/ar0521.c
716
REGS(be(0x341A), be(0x4735)), /* Samp&Hold pulse in ADC */
drivers/media/i2c/ar0521.c
717
REGS(be(0x3420), be(0x4735)), /* Samp&Hold pulse in ADC */
drivers/media/i2c/ar0521.c
718
REGS(be(0x3426), be(0x8A1A)), /* ADC offset distribution pulse */
drivers/media/i2c/ar0521.c
719
REGS(be(0x342A), be(0x0018)), /* pulse_config */
drivers/media/i2c/ar0521.c
722
REGS(be(0x3D00),
drivers/media/i2c/ar0521.c
779
REGS(be(0x3EB6), be(0x004C)), /* ECL */
drivers/media/i2c/ar0521.c
781
REGS(be(0x3EBA),
drivers/media/i2c/ar0521.c
785
REGS(be(0x3EC0),
drivers/media/i2c/ar0521.c
806
REGS(be(0x3F00),
drivers/media/i2c/ar0521.c
819
REGS(be(0x3F10),
drivers/media/i2c/ar0521.c
829
REGS(be(0x3F2C), be(0x442E)),
drivers/media/i2c/ar0521.c
831
REGS(be(0x3F3E),
drivers/media/i2c/imx258.c
541
.reg_list = REGS(mipi_1267mbps_19_2mhz_2l),
drivers/media/i2c/imx258.c
545
.reg_list = REGS(mipi_1267mbps_19_2mhz_4l),
drivers/media/i2c/imx258.c
554
.reg_list = REGS(mipi_640mbps_19_2mhz_2l),
drivers/media/i2c/imx258.c
558
.reg_list = REGS(mipi_640mbps_19_2mhz_4l),
drivers/media/i2c/imx258.c
570
.reg_list = REGS(mipi_1272mbps_24mhz_2l),
drivers/media/i2c/imx258.c
574
.reg_list = REGS(mipi_1272mbps_24mhz_4l),
drivers/media/i2c/imx258.c
583
.reg_list = REGS(mipi_642mbps_24mhz_2l),
drivers/media/i2c/imx258.c
587
.reg_list = REGS(mipi_642mbps_24mhz_4l),
drivers/video/fbdev/nvidia/nv_hw.c
1225
j = NV_RD32(par->REGS, 0x1540) & 0xff;
drivers/video/fbdev/nvidia/nv_setup.c
295
par->PRAMIN = par->REGS + (0x00710000 / 4);
drivers/video/fbdev/nvidia/nv_setup.c
296
par->PCRTC0 = par->REGS + (0x00600000 / 4);
drivers/video/fbdev/nvidia/nv_setup.c
297
par->PRAMDAC0 = par->REGS + (0x00680000 / 4);
drivers/video/fbdev/nvidia/nv_setup.c
298
par->PFB = par->REGS + (0x00100000 / 4);
drivers/video/fbdev/nvidia/nv_setup.c
299
par->PFIFO = par->REGS + (0x00002000 / 4);
drivers/video/fbdev/nvidia/nv_setup.c
300
par->PGRAPH = par->REGS + (0x00400000 / 4);
drivers/video/fbdev/nvidia/nv_setup.c
301
par->PEXTDEV = par->REGS + (0x00101000 / 4);
drivers/video/fbdev/nvidia/nv_setup.c
302
par->PTIMER = par->REGS + (0x00009000 / 4);
drivers/video/fbdev/nvidia/nv_setup.c
303
par->PMC = par->REGS + (0x00000000 / 4);
drivers/video/fbdev/nvidia/nv_setup.c
304
par->FIFO = par->REGS + (0x00800000 / 4);
drivers/video/fbdev/nvidia/nv_setup.c
307
par->PCIO0 = (u8 __iomem *) par->REGS + 0x00601000;
drivers/video/fbdev/nvidia/nv_setup.c
308
par->PDIO0 = (u8 __iomem *) par->REGS + 0x00681000;
drivers/video/fbdev/nvidia/nv_setup.c
309
par->PVIO = (u8 __iomem *) par->REGS + 0x000C0000;
drivers/video/fbdev/nvidia/nv_type.h
155
volatile u32 __iomem *REGS;
drivers/video/fbdev/nvidia/nvidia.c
1206
volatile u32 __iomem *REGS)
drivers/video/fbdev/nvidia/nvidia.c
1215
id = NV_RD32(REGS, 0x1800);
drivers/video/fbdev/nvidia/nvidia.c
1285
volatile u32 __iomem *REGS;
drivers/video/fbdev/nvidia/nvidia.c
1305
REGS = ioremap(nvidiafb_fix.mmio_start, nvidiafb_fix.mmio_len);
drivers/video/fbdev/nvidia/nvidia.c
1306
if (!REGS) {
drivers/video/fbdev/nvidia/nvidia.c
1311
Chipset = nvidia_get_chipset(pd, REGS);
drivers/video/fbdev/nvidia/nvidia.c
1350
par->REGS = REGS;
drivers/video/fbdev/nvidia/nvidia.c
1434
iounmap(REGS);
drivers/video/fbdev/nvidia/nvidia.c
1452
iounmap(par->REGS);