drivers/parisc/lba_pci.c

1087

lba_len = ~READ_REG32(lba_dev->hba.base_addr

drivers/parisc/lba_pci.c

1186

lba_num = READ_REG32(lba_dev->hba.base_addr + LBA_FW_SCRATCH);

drivers/parisc/lba_pci.c

1268

r->start = READ_REG32(lba_dev->hba.base_addr + LBA_LMMIO_BASE);

drivers/parisc/lba_pci.c

1276

rsize = ~ READ_REG32(lba_dev->hba.base_addr + LBA_LMMIO_MASK);

drivers/parisc/lba_pci.c

1314

r->start = READ_REG32(lba_dev->hba.base_addr + LBA_ELMMIO_BASE);

drivers/parisc/lba_pci.c

1322

rsize = READ_REG32(lba_dev->hba.base_addr + LBA_ELMMIO_MASK);

drivers/parisc/lba_pci.c

1332

r->start = READ_REG32(lba_dev->hba.base_addr + LBA_IOS_BASE) & ~1L;

drivers/parisc/lba_pci.c

1333

r->end = r->start + (READ_REG32(lba_dev->hba.base_addr + LBA_IOS_MASK) ^ (HBA_PORT_SPACE_SIZE - 1));

drivers/parisc/lba_pci.c

1391

bus_reset = READ_REG32(d->hba.base_addr + LBA_STAT_CTL + 4) & 1;

drivers/parisc/lba_pci.c

1396

stat = READ_REG32(d->hba.base_addr + LBA_ERROR_CONFIG);

drivers/parisc/lba_pci.c

1418

stat = READ_REG32(d->hba.base_addr + LBA_STAT_CTL);

drivers/parisc/lba_pci.c

1433

if (0 == READ_REG32(d->hba.base_addr + LBA_ARB_MASK)) {

drivers/parisc/lba_pci.c

1487

func_class = READ_REG32(addr + LBA_FCLASS);

drivers/parisc/lba_pci.c

207

error_config = READ_REG32(d->hba.base_addr + LBA_ERROR_CONFIG); \

drivers/parisc/lba_pci.c

210

status_control = READ_REG32(d->hba.base_addr + LBA_STAT_CTL); \

drivers/parisc/lba_pci.c

216

arb_mask = READ_REG32(d->hba.base_addr + LBA_ARB_MASK); \

drivers/parisc/lba_pci.c

242

lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR); \

drivers/parisc/lba_pci.c

252

lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR); \

drivers/parisc/lba_pci.c

290

error_status = READ_REG32(base + LBA_ERROR_STATUS); \

drivers/parisc/lba_pci.c

315

lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR); \

drivers/parisc/lba_pci.c

355

case 4: data = READ_REG32(data_reg); break;

drivers/parisc/lba_pci.c

397

case 4: *data = READ_REG32(data_reg); break;

drivers/parisc/lba_pci.c

464

lba_t32 = READ_REG32(d->hba.base_addr + LBA_PCI_CFG_ADDR);

drivers/parisc/lba_pci.c

499

*data = READ_REG32(data_reg); break;

drivers/parisc/sba_iommu.c

142

#define READ_REG(addr) READ_REG32(addr)

drivers/parisc/sba_iommu.c

1807

READ_REG32(sba_dev->sba_hpa + LMMIO_DIST_BASE),

drivers/parisc/sba_iommu.c

1808

READ_REG32(sba_dev->sba_hpa + LMMIO_DIST_MASK),

drivers/parisc/sba_iommu.c

1809

READ_REG32(sba_dev->sba_hpa + LMMIO_DIST_ROUTE));

drivers/parisc/sba_iommu.c

1814

READ_REG32(sba_dev->sba_hpa + LMMIO_DIRECT0_BASE + i*0x18),

drivers/parisc/sba_iommu.c

1815

READ_REG32(sba_dev->sba_hpa + LMMIO_DIRECT0_MASK + i*0x18),

drivers/parisc/sba_iommu.c

1816

READ_REG32(sba_dev->sba_hpa + LMMIO_DIRECT0_ROUTE + i*0x18));

drivers/parisc/sba_iommu.c

2041

base = READ_REG32(reg + LMMIO_DIRECT0_BASE);

drivers/parisc/sba_iommu.c

2045

size = READ_REG32(reg + LMMIO_DIRECT0_ROUTE);

drivers/parisc/sba_iommu.c

2051

size = ~ READ_REG32(reg + LMMIO_DIRECT0_MASK);

drivers/parisc/sba_iommu.c

2079

base = READ_REG32(sba->sba_hpa + LMMIO_DIST_BASE);

drivers/parisc/sba_iommu.c

2087

size = (~READ_REG32(sba->sba_hpa + LMMIO_DIST_MASK)) / ROPES_PER_IOC;