drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

120

#define RAS_TABLE_V2_1_INFO_START RAS_TABLE_HEADER_SIZE

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

121

#define RAS_RECORD_START_V2_1 (RAS_HDR_START + RAS_TABLE_HEADER_SIZE + \

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

123

#define RAS_MAX_RECORD_COUNT_V2_1 ((RAS_TBL_SIZE_BYTES - RAS_TABLE_HEADER_SIZE - \

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1454

buf_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1458

buf_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

149

(((_tbl_hdr)->tbl_size < RAS_TABLE_HEADER_SIZE) ? 0u : \

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

150

(((_tbl_hdr)->tbl_size - RAS_TABLE_HEADER_SIZE) / RAS_TABLE_RECORD_SIZE))

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

153

(((_tbl_hdr)->tbl_size < RAS_TABLE_HEADER_SIZE + \

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

155

(((_tbl_hdr)->tbl_size - RAS_TABLE_HEADER_SIZE - \

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1563

unsigned char buf[RAS_TABLE_HEADER_SIZE] = { 0 };

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1592

buf, RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1593

if (res < RAS_TABLE_HEADER_SIZE) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1616

if (hdr->tbl_size < RAS_TABLE_HEADER_SIZE + RAS_TABLE_V2_1_INFO_SIZE) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1620

RAS_TABLE_HEADER_SIZE + RAS_TABLE_V2_1_INFO_SIZE);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1628

if (hdr->tbl_size < RAS_TABLE_HEADER_SIZE) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1631

hdr->tbl_size, RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

270

u8 buf[RAS_TABLE_HEADER_SIZE];

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

282

buf, RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

288

} else if (res < RAS_TABLE_HEADER_SIZE) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

290

RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

464

hdr->tbl_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

479

hdr->tbl_size = RAS_TABLE_HEADER_SIZE;

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

817

control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

821

control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

94

#define RAS_RECORD_START (RAS_HDR_START + RAS_TABLE_HEADER_SIZE)

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

95

#define RAS_MAX_RECORD_COUNT ((RAS_TBL_SIZE_BYTES - RAS_TABLE_HEADER_SIZE) \

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1034

buf_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1038

buf_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1108

unsigned char buf[RAS_TABLE_HEADER_SIZE] = { 0 };

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1127

buf, RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1128

if (res < RAS_TABLE_HEADER_SIZE) {

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1145

if (hdr->tbl_size < RAS_TABLE_HEADER_SIZE + RAS_TABLE_V2_1_INFO_SIZE) {

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1149

RAS_TABLE_HEADER_SIZE + RAS_TABLE_V2_1_INFO_SIZE);

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1157

if (hdr->tbl_size < RAS_TABLE_HEADER_SIZE) {

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1160

hdr->tbl_size, RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

118

#define RAS_TABLE_V2_1_INFO_START RAS_TABLE_HEADER_SIZE

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

119

#define RAS_RECORD_START_V2_1 (RAS_HDR_START + RAS_TABLE_HEADER_SIZE + \

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

121

#define RAS_MAX_RECORD_COUNT_V2_1 ((RAS_TBL_SIZE_BYTES - RAS_TABLE_HEADER_SIZE - \

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

145

(((_tbl_hdr)->tbl_size < RAS_TABLE_HEADER_SIZE) ? 0u : \

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

146

(((_tbl_hdr)->tbl_size - RAS_TABLE_HEADER_SIZE) / RAS_TABLE_RECORD_SIZE))

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

149

(((_tbl_hdr)->tbl_size < RAS_TABLE_HEADER_SIZE + \

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

151

(((_tbl_hdr)->tbl_size - RAS_TABLE_HEADER_SIZE - \

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

296

u8 buf[RAS_TABLE_HEADER_SIZE];

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

307

buf, RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

312

} else if (res < RAS_TABLE_HEADER_SIZE) {

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

314

"Short write:%d out of %d\n", res, RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

464

hdr->tbl_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

476

hdr->tbl_size = RAS_TABLE_HEADER_SIZE;

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

771

control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

775

control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

92

#define RAS_RECORD_START (RAS_HDR_START + RAS_TABLE_HEADER_SIZE)

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

93

#define RAS_MAX_RECORD_COUNT ((RAS_TBL_SIZE_BYTES - RAS_TABLE_HEADER_SIZE) \