READY
return REGB_POLL_FLD(VPU_HW_BTRS_MTL_VPU_STATUS, READY, exp_val, PLL_TIMEOUT_US);
return REGB_POLL_FLD(VPU_HW_BTRS_LNL_VPU_STATUS, READY, exp_val, PLL_TIMEOUT_US);
return REG_TEST_FLD(VPU_HW_BTRS_MTL_VPU_STATUS, READY, val) &&
return REG_TEST_FLD(VPU_HW_BTRS_LNL_VPU_STATUS, READY, val) &&
mhi_state(READY, "READY") \
dev_st_trans(READY, "READY") \
MEI_PXP_MODE(READY);
M(READY, 0x001, ready, msg_req, ready_msg_rsp) \
if (readl(phy->base + EMAC_QSERDES_COM_RESET_SM) & READY)
PHY_STATE_STR(READY)
mdc800->state=READY;
mdc800->state=READY;
mdc800->state=READY;
if (mdc800->state != READY)
mdc800->state=READY;
mdc800->state=READY;