drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

120

#define RAS_TABLE_V2_1_INFO_START RAS_TABLE_HEADER_SIZE

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

121

#define RAS_RECORD_START_V2_1 (RAS_HDR_START + RAS_TABLE_HEADER_SIZE + \

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

123

#define RAS_MAX_RECORD_COUNT_V2_1 ((RAS_TBL_SIZE_BYTES - RAS_TABLE_HEADER_SIZE - \

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1446

buf_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1450

buf_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

149

RAS_TABLE_HEADER_SIZE) / RAS_TABLE_RECORD_SIZE)

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

152

RAS_TABLE_HEADER_SIZE - \

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1555

unsigned char buf[RAS_TABLE_HEADER_SIZE] = { 0 };

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1582

buf, RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1583

if (res < RAS_TABLE_HEADER_SIZE) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

267

u8 buf[RAS_TABLE_HEADER_SIZE];

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

279

buf, RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

285

} else if (res < RAS_TABLE_HEADER_SIZE) {

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

287

RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

461

hdr->tbl_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

476

hdr->tbl_size = RAS_TABLE_HEADER_SIZE;

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

811

control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

815

control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

94

#define RAS_RECORD_START (RAS_HDR_START + RAS_TABLE_HEADER_SIZE)

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

95

#define RAS_MAX_RECORD_COUNT ((RAS_TBL_SIZE_BYTES - RAS_TABLE_HEADER_SIZE) \

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1031

buf_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1035

buf_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1105

unsigned char buf[RAS_TABLE_HEADER_SIZE] = { 0 };

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1124

buf, RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

1125

if (res < RAS_TABLE_HEADER_SIZE) {

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

118

#define RAS_TABLE_V2_1_INFO_START RAS_TABLE_HEADER_SIZE

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

119

#define RAS_RECORD_START_V2_1 (RAS_HDR_START + RAS_TABLE_HEADER_SIZE + \

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

121

#define RAS_MAX_RECORD_COUNT_V2_1 ((RAS_TBL_SIZE_BYTES - RAS_TABLE_HEADER_SIZE - \

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

145

RAS_TABLE_HEADER_SIZE) / RAS_TABLE_RECORD_SIZE)

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

148

RAS_TABLE_HEADER_SIZE - \

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

293

u8 buf[RAS_TABLE_HEADER_SIZE];

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

304

buf, RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

309

} else if (res < RAS_TABLE_HEADER_SIZE) {

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

311

"Short write:%d out of %d\n", res, RAS_TABLE_HEADER_SIZE);

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

461

hdr->tbl_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

473

hdr->tbl_size = RAS_TABLE_HEADER_SIZE;

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

768

control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

772

control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE +

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

92

#define RAS_RECORD_START (RAS_HDR_START + RAS_TABLE_HEADER_SIZE)

drivers/gpu/drm/amd/ras/rascore/ras_eeprom.c

93

#define RAS_MAX_RECORD_COUNT ((RAS_TBL_SIZE_BYTES - RAS_TABLE_HEADER_SIZE) \