RAP
TA_FW_NAME(RAP),
lance->RAP = CSR0; /* PCnet-ISA Controller Status */
lance->RAP = CSR0; /* PCnet-ISA Controller Status */
lance->RAP, lance->RDP);
lance->RAP = CSR0; /* PCnet-ISA Controller Status */
lance->RAP = CSR88; /* Chip ID */
lance->RAP = CSR89; /* Chip ID */
lance->RAP = CSR3; /* Interrupt Masks and Deferral Control */
lance->RAP = CSR4; /* Test and Features Control */
lance->RAP = CSR8; /* Logical Address Filter, LADRF[15:0] */
lance->RAP = CSR9; /* Logical Address Filter, LADRF[31:16] */
lance->RAP = CSR10; /* Logical Address Filter, LADRF[47:32] */
lance->RAP = CSR11; /* Logical Address Filter, LADRF[63:48] */
lance->RAP = CSR12; /* Physical Address Register, PADR[15:0] */
lance->RAP = CSR13; /* Physical Address Register, PADR[31:16] */
lance->RAP = CSR14; /* Physical Address Register, PADR[47:32] */
lance->RAP = CSR15; /* Mode Register */
lance->RAP = CSR30; /* Base Address of Transmit Ring */
lance->RAP = CSR31; /* Base Address of transmit Ring */
lance->RAP = CSR24; /* Base Address of Receive Ring */
lance->RAP = CSR25; /* Base Address of Receive Ring */
lance->RAP = CSR76; /* Receive Ring Length */
lance->RAP = CSR78; /* Transmit Ring Length */
lance->RAP = ISACSR2; /* Miscellaneous Configuration */
lance->RAP = ISACSR5; /* LED1 Status */
lance->RAP = ISACSR6; /* LED2 Status */
lance->RAP = ISACSR7; /* LED3 Status */
lance->RAP = CSR0; /* PCnet-ISA Controller Status */
lance->RAP = CSR112; /* Missed Frame Count */
lance->RAP = CSR0; /* PCnet-ISA Controller Status */
lance->RAP = CSR0; /* PCnet-ISA Controller Status */
lance->RAP = CSR0; /* PCnet-ISA Controller Status */
lance->RAP = CSR0; /* PCnet-ISA Controller Status */
saved_addr = lance->RAP;
lance->RAP = CSR112; /* Missed Frame Count */
lance->RAP = saved_addr;
lance->RAP = CSR0; /* PCnet-ISA Controller Status */
lance->RAP = CSR15; /* Mode Register */
lance->RAP = CSR8 + (i << 8);
lance->RAP = CSR15; /* Mode Register */
lance->RAP = CSR0; /* PCnet-ISA Controller Status */
volatile u_short RAP; /* Register Address Port */
sbus_writew(LE_CSR0, __base + RAP); \
sbus_writew(LE_CSR1, lp->lregs + RAP);
sbus_writew(LE_CSR2, lp->lregs + RAP);
sbus_writew(LE_CSR3, lp->lregs + RAP);
sbus_writew(LE_CSR0, lp->lregs + RAP);
sbus_writew(LE_CSR0, lp->lregs + RAP);
sbus_writew(LE_CSR0, lp->lregs + RAP);