arch/arm64/include/asm/kvm_nested.h

192

!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, RANGE))

arch/arm64/include/asm/kvm_nested.h

221

!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, RANGE))

arch/arm64/kernel/cpufeature.c

2743

ARM64_CPUID_FIELDS(ID_AA64ISAR0_EL1, TLB, RANGE)

arch/arm64/kvm/config.c

168

#define FEAT_TLBIRANGE ID_AA64ISAR0_EL1, TLB, RANGE

arch/arm64/kvm/sys_regs.c

3872

!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, RANGE))

arch/arm64/kvm/sys_regs.c

3880

!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, RANGE))

drivers/comedi/drivers/ni_pcimio.c

128

RANGE(-5, 15),

drivers/comedi/drivers/ni_pcimio.c

130

RANGE(3, 7),

drivers/comedi/drivers/ni_pcimio.c

131

RANGE(4, 6),

drivers/comedi/drivers/pcmmio.c

173

RANGE(-2.5, 7.5)

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1019

u32 count = RANGE(regs->registers, i);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1064

u32 count = RANGE(regs->registers, i);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1101

u32 count = RANGE(regs->regs, i);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1137

regcount += RANGE(regs->registers, i);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1145

u32 count = RANGE(regs->registers, i);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1162

regcount += RANGE(regs, i);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1170

u32 count = RANGE(regs, i);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1202

regcount += RANGE(regs->registers, i);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1210

u32 count = RANGE(regs->registers, i);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1710

u32 count = RANGE(registers, i);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1730

u32 count = RANGE(registers, i);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1850

u32 count = RANGE(registers, j);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

580

int count = RANGE(dbgahb->registers, j);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

625

int count = RANGE(dbgahb->regs, i);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

741

int count = RANGE(cluster->registers, j);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

789

int count = RANGE(cluster->regs, i);

drivers/gpu/drm/nouveau/dispnv50/headc37d.c

187

NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_LUT, RANGE, asyh->olut.range) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

77

NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, RANGE, asyw->xlut.i.range) |