RAL
{"ldux", X(31,53), X_MASK, PPC64, 0, {RT, RAL, RB}},
{"lwzux", X(31,55), X_MASK, PPCCOM, 0, {RT, RAL, RB}},
{"lbzux", X(31,119), X_MASK, COM, 0, {RT, RAL, RB}},
{"lhzux", X(31,311), X_MASK, COM, 0, {RT, RAL, RB}},
#define RAM RAL + 1
{"lwaux", X(31,373), X_MASK, PPC64, 0, {RT, RAL, RB}},
{"lhaux", X(31,375), X_MASK, COM, 0, {RT, RAL, RB}},
{"lwzu", OP(33), OP_MASK, PPCCOM, PPCVLE, {RT, D, RAL}},
{"lbzu", OP(35), OP_MASK, COM, PPCVLE, {RT, D, RAL}},
{"lhzu", OP(41), OP_MASK, COM, PPCVLE, {RT, D, RAL}},
{"lhau", OP(43), OP_MASK, COM, PPCVLE, {RT, D, RAL}},
{"ldu", DSO(58,1), DS_MASK, PPC64, PPCVLE, {RT, DS, RAL}},
ew32(RAL(index), rar_low);
ew32(RAL(index), rar_low);
mac_reg = er32(RAL(i));
addr_low = er32(RAL(i));
ew32(RAL(index), rar_low);
ew32(RAL(rar_entries), 0);
rar_low = er32(RAL(0));