R14
R(R14);
__BUILD_KVM_GPR_ACCESSORS(r14, R14)
COPY(R12); COPY(R13); COPY(R14); COPY(R15);
COPY(R12); COPY(R13); COPY(R14); COPY(R15);
case R14:
[R14 >> 3] = HOST_R14,
case R14:
PUTREG(R14, r14);
GETREG(R14, r14);
DEFINE_LONGS(HOST_R14, R14);
wm8775_write(sd, R14, 0x1d4);
wm8775_write(sd, R14, vol_l | 0x100); /* 0x100= Left channel ADC zero cross enable */
PIN_GROUP(RGMII0, C20, C19, A8, R14, A7, P14, D20, A6, B6, N14, B7, B8);
PIN_GROUP(RMII0, C20, A8, R14, A7, P14, A6, B6, N14);
PIN(R14),
[F11] = 78, [F13] = 79, [N15] = 80, [C20] = 81, [C19] = 82, [A8] = 83, [R14] = 84,
up->curregs[R14] = BRENAB;
write_zsreg(channel, R14, regs[R14] & ~BRENAB);
write_zsreg(channel, R14, regs[R14]);
up->curregs[R14] = BRENAB;
write_zsreg(uap, R14, regs[R14] & ~BRENAB);
write_zsreg(uap, R14, regs[R14]);
uap->curregs[R14] = BRENAB;
uap->curregs[R14] = 0; /* BRG off */
uap->curregs[R14] = 0;
uap->curregs[R14] = 0;
uap->curregs[R14] = BRENAB;
up->curregs[R14] = BRSRC | BRENAB;
write_zsreg(channel, R14, regs[R14] & ~BRENAB);
write_zsreg(channel, R14, regs[R14]);
up->curregs[R14] = BRSRC | BRENAB;
write_zsreg(zport, R14, regs[14] & ~BRENABL);
write_zsreg(zport, R14, regs[14]);
write_zsreg(zport, R14, zport->regs[14]);
REGNUM(R14),
fail = (ucp->uc_mcontext.gp_regs[R14 + i] != gprs[i]);
R14 + i, ucp->uc_mcontext.gp_regs[R14 + i], gprs[i]);
fail = (tm_ucp->uc_mcontext.gp_regs[R14 + i] != gprs[NV_GPR_REGS + i]);
R14 + i, tm_ucp->uc_mcontext.gp_regs[R14 + i], gprs[NV_GPR_REGS + i]);