drivers/gpu/drm/radeon/radeon_clocks.c

152

RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &

drivers/gpu/drm/radeon/radeon_clocks.c

216

RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &

drivers/gpu/drm/radeon/radeon_clocks.c

268

RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &

drivers/gpu/drm/radeon/radeon_clocks.c

360

RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) &

drivers/gpu/drm/radeon/radeon_clocks.c

422

tmp = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV);

drivers/gpu/drm/radeon/radeon_clocks.c

425

WREG32_PLL(RADEON_M_SPLL_REF_FB_DIV, tmp);

drivers/gpu/drm/radeon/radeon_clocks.c

45

fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV);

drivers/gpu/drm/radeon/radeon_clocks.c

51

RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK;

drivers/gpu/drm/radeon/radeon_clocks.c

75

fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV);

drivers/gpu/drm/radeon/radeon_clocks.c

81

RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK;