RADEON_CLOCK_CNTL_INDEX
save = RREG32(RADEON_CLOCK_CNTL_INDEX);
WREG32(RADEON_CLOCK_CNTL_INDEX, tmp);
WREG32(RADEON_CLOCK_CNTL_INDEX, save);
WREG8(RADEON_CLOCK_CNTL_INDEX, reg & 0x3f);
WREG8(RADEON_CLOCK_CNTL_INDEX, ((reg & 0x3f) | RADEON_PLL_WR_EN));
ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3;
WREG32_P(RADEON_CLOCK_CNTL_INDEX,
WREG32_P(RADEON_CLOCK_CNTL_INDEX,
WREG32(RADEON_CLOCK_CNTL_INDEX, 0);
WREG8(RADEON_CLOCK_CNTL_INDEX, RADEON_PLL_TEST_CNTL);