RAC_MULT
RAC_ANA09 * RAC_MULT, BAC_OOBS_SEL);
RAC_ANA09 * RAC_MULT, BAC_OOBS_SEL);
rtw89_write16_set(rtwdev, phy_offset + RAC_ANA0D * RAC_MULT, BAC_RX_TEST_EN);
rtw89_write16(rtwdev, phy_offset + RAC_ANA10 * RAC_MULT, ADDR_SEL_PINOUT_DIS_VAL);
rtw89_write16_set(rtwdev, phy_offset + RAC_ANA19 * RAC_MULT, B_PCIE_BIT_RD_SEL);
oobs_val = rtw89_read16_mask(rtwdev, phy_offset + RAC_ANA1F * RAC_MULT,
rtw89_write16_mask(rtwdev, R_RAC_DIRECT_OFFSET_G1 + RAC_ANA03 * RAC_MULT,
rtw89_write16_set(rtwdev, R_RAC_DIRECT_OFFSET_G1 + RAC_ANA09 * RAC_MULT,
rtw89_write16_mask(rtwdev, R_RAC_DIRECT_OFFSET_G2 + RAC_ANA03 * RAC_MULT,
rtw89_write16_set(rtwdev, R_RAC_DIRECT_OFFSET_G2 + RAC_ANA09 * RAC_MULT,
rtw89_write16_clr(rtwdev, phy_offset + RAC_ANA19 * RAC_MULT,
RAC_ANA1F * RAC_MULT, OFFSET_CAL_MASK);
rtw89_write16_mask(rtwdev, phy_offset + RAC_ANA0B * RAC_MULT,
rtw89_write16_clr(rtwdev, phy_offset + RAC_ANA0D * RAC_MULT,
rtw89_write16(rtwdev, phy_offset + RAC_ANA1E * RAC_MULT, RAC_ANA1E_G1_VAL);
rtw89_write16(rtwdev, phy_offset + RAC_ANA2E * RAC_MULT, RAC_ANA2E_VAL);
rtw89_write16(rtwdev, phy_offset + RAC_ANA1E * RAC_MULT, RAC_ANA1E_G2_VAL);
rtw89_write16(rtwdev, phy_offset + RAC_ANA2E * RAC_MULT, RAC_ANA2E_VAL);
val16 = rtw89_read16(rtwdev, phy_offset + RAC_ANA10 * RAC_MULT);
rtw89_write16_set(rtwdev, phy_offset + RAC_ANA10 * RAC_MULT,
rtw89_write16_set(rtwdev, phy_offset + RAC_ANA19 * RAC_MULT,
phy_offset + RAC_ANA1F * RAC_MULT,
RAC_MULT);
rtw89_write16(rtwdev, phy_offset + RAC_ANA24 * RAC_MULT,
rtw89_write16_set(rtwdev, phy_offset + RAC_ANA0A * RAC_MULT,
R_RAC_DIRECT_OFFSET_G1 + RAC_ANA0C * RAC_MULT,
rtw89_write16_set(rtwdev, phy_offset + RAC_ANA0C * RAC_MULT,
RAC_ANA41 * RAC_MULT, PHY_ERR_FLAG_EN);
RAC_ANA41 * RAC_MULT, PHY_ERR_FLAG_EN);
RAC_ANA41 * RAC_MULT, PHY_ERR_FLAG_EN);
RAC_ANA41 * RAC_MULT, PHY_ERR_FLAG_EN);
RAC_ANA09 * RAC_MULT, BAC_OOBS_SEL);
RAC_ANA09 * RAC_MULT, BAC_OOBS_SEL);
rtw89_write16_clr(rtwdev, phy_offset + RAC_ANA19 * RAC_MULT,
RAC_ANA1F * RAC_MULT, OFFSET_CAL_MASK);
rtw89_write16_mask(rtwdev, phy_offset + RAC_ANA0B * RAC_MULT,
rtw89_write16_clr(rtwdev, phy_offset + RAC_ANA0D * RAC_MULT,
rtw89_write16_set(rtwdev, phy_offset + RAC_ANA0D * RAC_MULT,
rtw89_write16_mask(rtwdev, phy_offset + RAC_ANA10 * RAC_MULT,
rtw89_write16_clr(rtwdev, phy_offset + RAC_ANA10 * RAC_MULT,
rtw89_write16_set(rtwdev, phy_offset + RAC_ANA19 * RAC_MULT,
RAC_ANA1F * RAC_MULT, OOBS_LEVEL_MASK);
rtw89_write16_mask(rtwdev, phy_offset + RAC_ANA03 * RAC_MULT,
rtw89_write16_set(rtwdev, phy_offset + RAC_ANA09 * RAC_MULT,