QUEUE_1_SIZE
P2_Q1_BUFFER_OFFSET + ((QUEUE_1_SIZE - 1) *
P2_Q1_BD_OFFSET + ((QUEUE_1_SIZE - 1) * BD_SIZE),
P1_Q1_BUFFER_OFFSET + ((QUEUE_1_SIZE - 1) *
P1_Q1_BD_OFFSET + ((QUEUE_1_SIZE - 1) * BD_SIZE),
P1_Q1_BD_OFFSET + ((QUEUE_1_SIZE - 1) * BD_SIZE),
P2_Q1_BD_OFFSET + ((QUEUE_1_SIZE - 1) * BD_SIZE),
((QUEUE_1_SIZE - 1) * ICSS_BLOCK_SIZE),
P1_Q1_BD_OFFSET + ((QUEUE_1_SIZE - 1) * BD_SIZE),
((QUEUE_1_SIZE - 1) * ICSS_BLOCK_SIZE),
P2_Q1_BD_OFFSET + ((QUEUE_1_SIZE - 1) * BD_SIZE),
writew(QUEUE_1_SIZE, dram);
#define PORT_BD_SIZE ((QUEUE_1_SIZE + QUEUE_2_SIZE + \
#define P2_Q2_BD_OFFSET (P2_Q1_BD_OFFSET + QUEUE_1_SIZE * BD_SIZE)
#define P1_Q2_BD_OFFSET (P1_Q1_BD_OFFSET + QUEUE_1_SIZE * BD_SIZE)
#define P2_Q2_BUFFER_OFFSET (P2_Q1_BUFFER_OFFSET + QUEUE_1_SIZE * \
#define P1_Q2_BUFFER_OFFSET (P1_Q1_BUFFER_OFFSET + QUEUE_1_SIZE * \