R600_POWER_LEVEL_MEDIUM
r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_MEDIUM, 0);
r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_MEDIUM, 0);
r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_MEDIUM, 0);
r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_MEDIUM, R600_DISPLAY_WATERMARK_HIGH);
r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false);
r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_MEDIUM,
r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_MEDIUM,
r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_MEDIUM,
r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_MEDIUM,
r600_power_level_set_pcie_gen2(rdev, R600_POWER_LEVEL_MEDIUM,
pi->hw.pcie_gen2[R600_POWER_LEVEL_MEDIUM]);
r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_MEDIUM, 1);
r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_MEDIUM,
r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_MEDIUM,
r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_MEDIUM,
rv6xx_enable_engine_spread_spectrum(rdev, R600_POWER_LEVEL_MEDIUM, false);
r600_power_level_set_pcie_gen2(rdev, R600_POWER_LEVEL_MEDIUM,
r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, true);
rv6xx_enable_engine_spread_spectrum(rdev, R600_POWER_LEVEL_MEDIUM, false);
r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, true);
r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, true);
r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false);
r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false);
r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, true);
r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false);
r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false);
pi->hw.sclks[R600_POWER_LEVEL_MEDIUM] =
pi->hw.medium_sclk_index = R600_POWER_LEVEL_MEDIUM;
pi->hw.mclks[R600_POWER_LEVEL_MEDIUM] =
pi->hw.medium_mclk_index = R600_POWER_LEVEL_MEDIUM;
pi->hw.vddc[R600_POWER_LEVEL_MEDIUM] = state->medium.vddc;
pi->hw.backbias[R600_POWER_LEVEL_MEDIUM] =
pi->hw.pcie_gen2[R600_POWER_LEVEL_MEDIUM] =
pi->hw.medium_vddc_index = R600_POWER_LEVEL_MEDIUM;
pi->hw.sclks[R600_POWER_LEVEL_MEDIUM],
R600_POWER_LEVEL_MEDIUM);
STATE1(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_MEDIUM]) |
pi->hw.sclks[R600_POWER_LEVEL_MEDIUM])) |
r600_power_level_set_enter_index(rdev, R600_POWER_LEVEL_MEDIUM);