R15
R(R15);
BUILD_KVM_GPR_ACCESSORS(r15, R15)
COPY(R12); COPY(R13); COPY(R14); COPY(R15);
COPY(R12); COPY(R13); COPY(R14); COPY(R15);
case R15:
[R15 >> 3] = HOST_R15,
case R15:
PUTREG(R15, r15);
GETREG(R15, r15);
DEFINE_LONGS(HOST_R15, R15);
wm8739_write(sd, R15, 0x00);
wm8775_write(sd, R15, 0x1d4);
wm8775_write(sd, R15, vol_r | 0x100); /* 0x100= Right channel ADC zero cross enable */
cl(scc, R15, TxUIE); /* count it. */
or(scc, R15, SYNCIE);
cl(scc, R15, DCDIE);
or(scc, R15, DCDIE);
cl(scc, R15, SYNCIE);
or(scc,R15,SHDLCE|FIFOE); /* enable FIFO, SDLC/HDLC Enhancements (From now R7 is R7') */
wr(scc,R15, BRKIE|TxUIE|(scc->kiss.softdcd? SYNCIE:DCDIE));
or(scc, R15, TxUIE);
cl(scc, R15, DCDIE|SYNCIE); /* No DCD changes, please */
or(scc,R15, scc->kiss.softdcd? SYNCIE:DCDIE);
cl(scc, R15, DCDIE|SYNCIE);
or(scc, R15, scc->kiss.softdcd? SYNCIE:DCDIE);
write_zsreg(channel, R15, regs[R15]);
if (up->curregs[R15] & BRKIE) {
new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE);
if (new_reg != up->curregs[R15]) {
up->curregs[R15] = new_reg;
write_zsreg(channel, R15, up->curregs[R15]);
up->curregs[R15] |= BRKIE;
uap->curregs[R15] |= DCDIE | SYNCIE | CTSIE;
uap->curregs[R15] &= ~(DCDIE | SYNCIE | CTSIE);
write_zsreg(uap, R15, regs[R15] | EN85C30);
write_zsreg(uap, R15, regs[R15] & ~EN85C30);
new_reg = uap->curregs[R15] | (DCDIE | SYNCIE | CTSIE);
if (new_reg != uap->curregs[R15]) {
uap->curregs[R15] = new_reg;
write_zsreg(uap, R15, uap->curregs[R15]);
uap->curregs[R15] = BRKIE;
up->curregs[R15] |= BRKIE;
up->curregs[R15] |= BRKIE;
up->curregs[R15] = FIFOEN; /* Use FIFO if on ESCC */
write_zsreg(channel, R15, (regs[R15] | WR7pEN) & ~FIFOEN);
r15 = read_zsreg(channel, R15);
write_zsreg(channel, R15, regs[R15] & ~WR7pEN);
regs[R15] &= ~FIFOEN;
new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE);
if (new_reg != up->curregs[R15]) {
up->curregs[R15] = new_reg;
write_zsreg(channel, R15, up->curregs[R15] & ~WR7pEN);
write_zsreg(zport, R15, regs[15]);
write_zsreg(zport_a, R15, zport_a->regs[15]);
write_zsreg(zport, R15, zport->regs[15]);
write_zsreg(zport_a, R15, zport_a->regs[15]);
write_zsreg(zport, R15, zport->regs[15]);
write_zsreg(zport, R15, zport->regs[15]);