drivers/crypto/hisilicon/debugfs.c

186

sqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);

drivers/crypto/hisilicon/debugfs.c

187

sqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);

drivers/crypto/hisilicon/debugfs.c

196

sqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);

drivers/crypto/hisilicon/debugfs.c

197

sqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);

drivers/crypto/hisilicon/debugfs.c

223

cqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);

drivers/crypto/hisilicon/debugfs.c

224

cqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);

drivers/crypto/hisilicon/debugfs.c

233

cqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);

drivers/crypto/hisilicon/debugfs.c

234

cqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);

drivers/crypto/hisilicon/debugfs.c

271

aeqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);

drivers/crypto/hisilicon/debugfs.c

272

aeqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);

drivers/crypto/hisilicon/debugfs.c

273

eqc.base_h = cpu_to_le32(QM_XQC_ADDR_MASK);

drivers/crypto/hisilicon/debugfs.c

274

eqc.base_l = cpu_to_le32(QM_XQC_ADDR_MASK);