drivers/crypto/hisilicon/qm.c

1469

writel(QM_ABNORMAL_INT_MASK_VALUE, qm->io_base + QM_ABNORMAL_INT_MASK);

drivers/crypto/hisilicon/qm.c

1494

irq_unmask &= readl(qm->io_base + QM_ABNORMAL_INT_MASK);

drivers/crypto/hisilicon/qm.c

1495

writel(irq_unmask, qm->io_base + QM_ABNORMAL_INT_MASK);

drivers/crypto/hisilicon/qm.c

1502

irq_mask |= readl(qm->io_base + QM_ABNORMAL_INT_MASK);

drivers/crypto/hisilicon/qm.c

1503

writel(irq_mask, qm->io_base + QM_ABNORMAL_INT_MASK);

drivers/crypto/hisilicon/qm.c

1516

irq_unmask &= readl(qm->io_base + QM_ABNORMAL_INT_MASK);

drivers/crypto/hisilicon/qm.c

1517

writel(irq_unmask, qm->io_base + QM_ABNORMAL_INT_MASK);

drivers/crypto/hisilicon/qm.c

1524

irq_mask |= readl(qm->io_base + QM_ABNORMAL_INT_MASK);

drivers/crypto/hisilicon/qm.c

1525

writel(irq_mask, qm->io_base + QM_ABNORMAL_INT_MASK);

drivers/crypto/hisilicon/qm.c

4759

writel(val, qm->io_base + QM_ABNORMAL_INT_MASK);

drivers/crypto/hisilicon/qm.c

4773

writel(~qm->error_mask, qm->io_base + QM_ABNORMAL_INT_MASK);