drivers/soc/fsl/qe/gpio.c

23

#define PIN_MASK(gpio) (1UL << (QE_PIO_PINS - 1 - (gpio)))

drivers/soc/fsl/qe/gpio.c

240

u32 mask1 = 1 << (QE_PIO_PINS - (pin + 1));

drivers/soc/fsl/qe/gpio.c

241

u32 mask2 = 0x3 << (QE_PIO_PINS - (pin % (QE_PIO_PINS / 2) + 1) * 2);

drivers/soc/fsl/qe/gpio.c

242

bool second_reg = pin > (QE_PIO_PINS / 2) - 1;

drivers/soc/fsl/qe/gpio.c

308

gc->ngpio = QE_PIO_PINS;

drivers/soc/fsl/qe/qe_io.c

126

if (pin >= QE_PIO_PINS)

drivers/soc/fsl/qe/qe_io.c

129

pin_mask = (u32) (1 << (QE_PIO_PINS - 1 - pin));

drivers/soc/fsl/qe/qe_io.c

56

pin_mask1bit = (u32) (1 << (QE_PIO_PINS - (pin + 1)));

drivers/soc/fsl/qe/qe_io.c

66

tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?

drivers/soc/fsl/qe/qe_io.c

71

pin_mask2bits = (u32) (0x3 << (QE_PIO_PINS -

drivers/soc/fsl/qe/qe_io.c

72

(pin % (QE_PIO_PINS / 2) + 1) * 2));

drivers/soc/fsl/qe/qe_io.c

75

new_mask2bits = (u32) (dir << (QE_PIO_PINS -

drivers/soc/fsl/qe/qe_io.c

76

(pin % (QE_PIO_PINS / 2) + 1) * 2));

drivers/soc/fsl/qe/qe_io.c

79

if (pin > (QE_PIO_PINS / 2) - 1) {

drivers/soc/fsl/qe/qe_io.c

89

tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?

drivers/soc/fsl/qe/qe_io.c

93

new_mask2bits = (u32) (assignment << (QE_PIO_PINS -

drivers/soc/fsl/qe/qe_io.c

94

(pin % (QE_PIO_PINS / 2) + 1) * 2));

drivers/soc/fsl/qe/qe_io.c

96

if (pin > (QE_PIO_PINS / 2) - 1) {