PhyCtrl
#define mii_delay() dr8(PhyCtrl)
data = ((data) ? MII_DATA1 : 0) | (dr8(PhyCtrl) & 0xf8) | MII_WRITE;
dw8(PhyCtrl, data);
dw8(PhyCtrl, data | MII_CLK);
data = (dr8(PhyCtrl) & 0xf8) | MII_READ;
dw8(PhyCtrl, data);
dw8(PhyCtrl, data | MII_CLK);
return (dr8(PhyCtrl) >> 1) & 1;
dw8(PhyCtrl, dr8(PhyCtrl) | psib[i]);
writew(target, ioaddr + PhyCtrl);
readw(ioaddr + PhyCtrl);
phy_ctrl = ioread32(port_base + PhyCtrl);
old_phy_ctrl = ioread32(port_base + PhyCtrl);
iowrite32(phy_ctrl, port_base + PhyCtrl);
phy_ctrl = ioread32(port_base + PhyCtrl);
iowrite32(phy_ctrl, port_base + PhyCtrl);
iowrite32(phy_ctrl, port_base + PhyCtrl);
set_register(p, PhyCtrl, 0);
set_register(p, PhyCtrl, (indx | cmd));
ret = get_registers(p, PhyCtrl, 1, data);