P_DP0_PHY_PLL_VCO_DIV_CLK
{ P_DP0_PHY_PLL_VCO_DIV_CLK, 2 },
{ P_DP0_PHY_PLL_VCO_DIV_CLK, 2 },
{ P_DP0_PHY_PLL_VCO_DIV_CLK, 2 },
{ P_DP0_PHY_PLL_VCO_DIV_CLK, 2 },
{ P_DP0_PHY_PLL_VCO_DIV_CLK, 2 },
{ P_DP0_PHY_PLL_VCO_DIV_CLK, 2 },
{ P_DP0_PHY_PLL_VCO_DIV_CLK, 2 },
{ P_DP0_PHY_PLL_VCO_DIV_CLK, 2 },
{ P_DP0_PHY_PLL_VCO_DIV_CLK, 2 },
{ P_DP0_PHY_PLL_VCO_DIV_CLK, 2 },