arch/arm/mach-omap2/powerdomain.c

148

if ((pwrdm->pwrsts_logic_ret == PWRSTS_OFF_RET) &&

arch/arm/mach-omap2/powerdomain.c

155

if ((pwrdm->pwrsts_mem_ret[i] == PWRSTS_OFF_RET) &&

arch/arm/mach-omap2/powerdomain.h

38

#define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | PWRSTS_ON)

arch/arm/mach-omap2/powerdomains2xxx_data.c

45

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains2xxx_data.c

63

[0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */

arch/arm/mach-omap2/powerdomains2xxx_data.c

64

[1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */

arch/arm/mach-omap2/powerdomains2xxx_data.c

65

[2] = PWRSTS_OFF_RET, /* MEM3RETSTATE */

arch/arm/mach-omap2/powerdomains33xx_data.c

100

[1] = PWRSTS_OFF_RET, /* per_mem */

arch/arm/mach-omap2/powerdomains33xx_data.c

101

[2] = PWRSTS_OFF_RET, /* ram_mem */

arch/arm/mach-omap2/powerdomains33xx_data.c

117

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains33xx_data.c

142

[0] = PWRSTS_OFF_RET, /* mpu_l1 */

arch/arm/mach-omap2/powerdomains33xx_data.c

143

[1] = PWRSTS_OFF_RET, /* mpu_l2 */

arch/arm/mach-omap2/powerdomains33xx_data.c

144

[2] = PWRSTS_OFF_RET, /* mpu_ram */

arch/arm/mach-omap2/powerdomains33xx_data.c

23

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains33xx_data.c

40

[0] = PWRSTS_OFF_RET, /* gfx_mem */

arch/arm/mach-omap2/powerdomains33xx_data.c

74

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains33xx_data.c

99

[0] = PWRSTS_OFF_RET, /* pruss_mem */

arch/arm/mach-omap2/powerdomains3xxx_data.c

102

[0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */

arch/arm/mach-omap2/powerdomains3xxx_data.c

103

[1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */

arch/arm/mach-omap2/powerdomains3xxx_data.c

116

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains3xxx_data.c

124

[0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */

arch/arm/mach-omap2/powerdomains3xxx_data.c

125

[1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */

arch/arm/mach-omap2/powerdomains3xxx_data.c

236

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains3xxx_data.c

36

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains3xxx_data.c

39

[0] = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains3xxx_data.c

40

[1] = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains3xxx_data.c

41

[2] = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains3xxx_data.c

42

[3] = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains3xxx_data.c

57

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains3xxx_data.c

61

[0] = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains3xxx_data.c

99

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains43xx_data.c

100

[3] = PWRSTS_OFF_RET, /* ram2_mem */

arch/arm/mach-omap2/powerdomains43xx_data.c

36

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains43xx_data.c

39

[0] = PWRSTS_OFF_RET, /* mpu_l1 */

arch/arm/mach-omap2/powerdomains43xx_data.c

40

[1] = PWRSTS_OFF_RET, /* mpu_l2 */

arch/arm/mach-omap2/powerdomains43xx_data.c

41

[2] = PWRSTS_OFF_RET, /* mpu_ram */

arch/arm/mach-omap2/powerdomains43xx_data.c

94

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains43xx_data.c

97

[0] = PWRSTS_OFF_RET, /* icss_mem */

arch/arm/mach-omap2/powerdomains43xx_data.c

98

[1] = PWRSTS_OFF_RET, /* per_mem */

arch/arm/mach-omap2/powerdomains43xx_data.c

99

[2] = PWRSTS_OFF_RET, /* ram1_mem */

arch/arm/mach-omap2/powerdomains44xx_data.c

118

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains44xx_data.c

122

[1] = PWRSTS_OFF_RET, /* tesla_l1 */

arch/arm/mach-omap2/powerdomains44xx_data.c

123

[2] = PWRSTS_OFF_RET, /* tesla_l2 */

arch/arm/mach-omap2/powerdomains44xx_data.c

156

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains44xx_data.c

159

[0] = PWRSTS_OFF_RET, /* cpu0_l1 */

arch/arm/mach-omap2/powerdomains44xx_data.c

173

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains44xx_data.c

176

[0] = PWRSTS_OFF_RET, /* cpu1_l1 */

arch/arm/mach-omap2/powerdomains44xx_data.c

206

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains44xx_data.c

209

[0] = PWRSTS_OFF_RET, /* mpu_l1 */

arch/arm/mach-omap2/powerdomains44xx_data.c

210

[1] = PWRSTS_OFF_RET, /* mpu_l2 */

arch/arm/mach-omap2/powerdomains44xx_data.c

231

[1] = PWRSTS_OFF_RET, /* sl2_mem */

arch/arm/mach-omap2/powerdomains44xx_data.c

232

[2] = PWRSTS_OFF_RET, /* tcm1_mem */

arch/arm/mach-omap2/powerdomains44xx_data.c

233

[3] = PWRSTS_OFF_RET, /* tcm2_mem */

arch/arm/mach-omap2/powerdomains44xx_data.c

268

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains44xx_data.c

286

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains44xx_data.c

37

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains44xx_data.c

43

[3] = PWRSTS_OFF_RET, /* ducati_l2ram */

arch/arm/mach-omap2/powerdomains44xx_data.c

44

[4] = PWRSTS_OFF_RET, /* ducati_unicache */

arch/arm/mach-omap2/powerdomains54xx_data.c

111

[0] = PWRSTS_OFF_RET, /* cpu0_l1 */

arch/arm/mach-omap2/powerdomains54xx_data.c

128

[0] = PWRSTS_OFF_RET, /* cpu1_l1 */

arch/arm/mach-omap2/powerdomains54xx_data.c

144

[0] = PWRSTS_OFF_RET, /* emu_bank */

arch/arm/mach-omap2/powerdomains54xx_data.c

147

[0] = PWRSTS_OFF_RET, /* emu_bank */

arch/arm/mach-omap2/powerdomains54xx_data.c

161

[0] = PWRSTS_OFF_RET, /* mpu_l2 */

arch/arm/mach-omap2/powerdomains54xx_data.c

165

[0] = PWRSTS_OFF_RET, /* mpu_l2 */

arch/arm/mach-omap2/powerdomains54xx_data.c

166

[1] = PWRSTS_OFF_RET, /* mpu_ram */

arch/arm/mach-omap2/powerdomains54xx_data.c

187

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains54xx_data.c

190

[0] = PWRSTS_OFF_RET, /* dsp_edma */

arch/arm/mach-omap2/powerdomains54xx_data.c

191

[1] = PWRSTS_OFF_RET, /* dsp_l1 */

arch/arm/mach-omap2/powerdomains54xx_data.c

192

[2] = PWRSTS_OFF_RET, /* dsp_l2 */

arch/arm/mach-omap2/powerdomains54xx_data.c

195

[0] = PWRSTS_OFF_RET, /* dsp_edma */

arch/arm/mach-omap2/powerdomains54xx_data.c

196

[1] = PWRSTS_OFF_RET, /* dsp_l1 */

arch/arm/mach-omap2/powerdomains54xx_data.c

197

[2] = PWRSTS_OFF_RET, /* dsp_l2 */

arch/arm/mach-omap2/powerdomains54xx_data.c

211

[0] = PWRSTS_OFF_RET, /* cam_mem */

arch/arm/mach-omap2/powerdomains54xx_data.c

214

[0] = PWRSTS_OFF_RET, /* cam_mem */

arch/arm/mach-omap2/powerdomains54xx_data.c

226

.pwrsts_logic_ret = PWRSTS_OFF_RET,

arch/arm/mach-omap2/powerdomains54xx_data.c

229

[0] = PWRSTS_OFF_RET, /* l3init_bank1 */

arch/arm/mach-omap2/powerdomains54xx_data.c

230

[1] = PWRSTS_OFF_RET, /* l3init_bank2 */

arch/arm/mach-omap2/powerdomains54xx_data.c

233

[0] = PWRSTS_OFF_RET, /* l3init_bank1 */

arch/arm/mach-omap2/powerdomains54xx_data.c

234

[1] = PWRSTS_OFF_RET, /* l3init_bank2 */

arch/arm/mach-omap2/powerdomains54xx_data.c

248

[0] = PWRSTS_OFF_RET, /* gpu_mem */

arch/arm/mach-omap2/powerdomains54xx_data.c

251

[0] = PWRSTS_OFF_RET, /* gpu_mem */

arch/arm/mach-omap2/powerdomains54xx_data.c

281

[0] = PWRSTS_OFF_RET, /* hwa_mem */

arch/arm/mach-omap2/powerdomains54xx_data.c

282

[1] = PWRSTS_OFF_RET, /* sl2_mem */

arch/arm/mach-omap2/powerdomains54xx_data.c

283

[2] = PWRSTS_OFF_RET, /* tcm1_mem */

arch/arm/mach-omap2/powerdomains54xx_data.c

284

[3] = PWRSTS_OFF_RET, /* tcm2_mem */

arch/arm/mach-omap2/powerdomains54xx_data.c

287

[0] = PWRSTS_OFF_RET, /* hwa_mem */

arch/arm/mach-omap2/powerdomains54xx_data.c

288

[1] = PWRSTS_OFF_RET, /* sl2_mem */

arch/arm/mach-omap2/powerdomains54xx_data.c

289

[2] = PWRSTS_OFF_RET, /* tcm1_mem */

arch/arm/mach-omap2/powerdomains54xx_data.c

290

[3] = PWRSTS_OFF_RET, /* tcm2_mem */

arch/arm/mach-omap2/powerdomains54xx_data.c

38

[0] = PWRSTS_OFF_RET, /* core_nret_bank */

arch/arm/mach-omap2/powerdomains54xx_data.c

39

[1] = PWRSTS_OFF_RET, /* core_ocmram */

arch/arm/mach-omap2/powerdomains54xx_data.c

40

[2] = PWRSTS_OFF_RET, /* core_other_bank */

arch/arm/mach-omap2/powerdomains54xx_data.c

41

[3] = PWRSTS_OFF_RET, /* ipu_l2ram */

arch/arm/mach-omap2/powerdomains54xx_data.c

42

[4] = PWRSTS_OFF_RET, /* ipu_unicache */

arch/arm/mach-omap2/powerdomains54xx_data.c

45

[0] = PWRSTS_OFF_RET, /* core_nret_bank */

arch/arm/mach-omap2/powerdomains54xx_data.c

46

[1] = PWRSTS_OFF_RET, /* core_ocmram */

arch/arm/mach-omap2/powerdomains54xx_data.c

47

[2] = PWRSTS_OFF_RET, /* core_other_bank */

arch/arm/mach-omap2/powerdomains54xx_data.c

48

[3] = PWRSTS_OFF_RET, /* ipu_l2ram */

arch/arm/mach-omap2/powerdomains54xx_data.c

49

[4] = PWRSTS_OFF_RET, /* ipu_unicache */

arch/arm/mach-omap2/powerdomains54xx_data.c

64

[0] = PWRSTS_OFF_RET, /* aessmem */

arch/arm/mach-omap2/powerdomains54xx_data.c

65

[1] = PWRSTS_OFF_RET, /* periphmem */

arch/arm/mach-omap2/powerdomains54xx_data.c

68

[0] = PWRSTS_OFF_RET, /* aessmem */

arch/arm/mach-omap2/powerdomains54xx_data.c

69

[1] = PWRSTS_OFF_RET, /* periphmem */

arch/arm/mach-omap2/powerdomains54xx_data.c

93

[0] = PWRSTS_OFF_RET, /* dss_mem */

arch/arm/mach-omap2/powerdomains54xx_data.c

96

[0] = PWRSTS_OFF_RET, /* dss_mem */

arch/arm/mach-omap2/powerdomains7xx_data.c

172

[0] = PWRSTS_OFF_RET, /* cpu0_l1 */

arch/arm/mach-omap2/powerdomains7xx_data.c

188

[0] = PWRSTS_OFF_RET, /* cpu1_l1 */

arch/arm/mach-omap2/powerdomains7xx_data.c

217

[0] = PWRSTS_OFF_RET, /* mpu_l2 */