arch/x86/kvm/mmu/mmu.c

2503

if (iterator->level >= PT64_ROOT_4LEVEL &&

arch/x86/kvm/mmu/mmu.c

2504

vcpu->arch.mmu->cpu_role.base.level < PT64_ROOT_4LEVEL &&

arch/x86/kvm/mmu/mmu.c

3991

if (shadow_root_level >= PT64_ROOT_4LEVEL) {

arch/x86/kvm/mmu/mmu.c

4153

if (mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {

arch/x86/kvm/mmu/mmu.c

4171

if (mmu->root_role.level >= PT64_ROOT_4LEVEL) {

arch/x86/kvm/mmu/mmu.c

4214

else if (mmu->root_role.level == PT64_ROOT_4LEVEL)

arch/x86/kvm/mmu/mmu.c

4230

bool need_pml5 = mmu->root_role.level > PT64_ROOT_4LEVEL;

arch/x86/kvm/mmu/mmu.c

4242

mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL ||

arch/x86/kvm/mmu/mmu.c

4243

mmu->root_role.level < PT64_ROOT_4LEVEL)

arch/x86/kvm/mmu/mmu.c

4347

if (vcpu->arch.mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {

arch/x86/kvm/mmu/mmu.c

5410

case PT64_ROOT_4LEVEL:

arch/x86/kvm/mmu/mmu.c

5831

: PT64_ROOT_4LEVEL;

arch/x86/kvm/mmu/mmu.c

6008

cpu_role.base.level == PT64_ROOT_4LEVEL)

arch/x86/kvm/svm/svm.c

204

return pgtable_l5_enabled() ? PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL;

arch/x86/kvm/svm/svm.c

4658

} else if (root_level >= PT64_ROOT_4LEVEL) {