arch/arc/include/asm/pgtable-levels.h

76

#define PUD_MASK (~(PUD_SIZE - 1))

arch/arm/mm/dump.c

373

addr = start + i * PUD_SIZE;

arch/arm64/include/asm/hugetlb.h

78

case PUD_SIZE:

arch/arm64/include/asm/hugetlb.h

79

__flush_tlb_range(vma, start, end, PUD_SIZE, last_level, 1);

arch/arm64/include/asm/pgtable-hwdef.h

67

#define PUD_MASK (~(PUD_SIZE-1))

arch/arm64/include/asm/pgtable.h

1356

case PUD_SIZE:

arch/arm64/include/asm/pgtable.h

689

case PUD_SIZE:

arch/arm64/include/asm/pgtable.h

728

__set_ptes_anysz(mm, addr, (pte_t *)pudp, pud_pte(pud), nr, PUD_SIZE);

arch/arm64/include/asm/pgtable.h

94

__flush_tlb_range(vma, addr, end, PUD_SIZE, false, 1)

arch/arm64/kvm/mmu.c

101

n += DIV_ROUND_UP(range, PUD_SIZE);

arch/arm64/kvm/mmu.c

1448

if ((hva & (PUD_SIZE - 1)) == (pa & (PUD_SIZE - 1)) &&

arch/arm64/kvm/mmu.c

1449

ALIGN_DOWN(hva, PUD_SIZE) >= vma->vm_start &&

arch/arm64/kvm/mmu.c

1450

ALIGN(hva, PUD_SIZE) <= vma->vm_end)

arch/arm64/kvm/mmu.c

1706

if (fault_supports_stage2_huge_mapping(memslot, hva, PUD_SIZE))

arch/arm64/kvm/mmu.c

1732

max_map_size = force_pte ? PAGE_SIZE : PUD_SIZE;

arch/arm64/kvm/mmu.c

1747

if (max_map_size >= PMD_SIZE && max_map_size < PUD_SIZE)

arch/arm64/mm/hugetlbpage.c

255

if (sz == PUD_SIZE) {

arch/arm64/mm/hugetlbpage.c

296

if (sz != PUD_SIZE && pud_none(pud))

arch/arm64/mm/hugetlbpage.c

326

case PUD_SIZE:

arch/arm64/mm/hugetlbpage.c

328

return PGDIR_SIZE - PUD_SIZE;

arch/arm64/mm/hugetlbpage.c

332

return PUD_SIZE - CONT_PMD_SIZE;

arch/arm64/mm/hugetlbpage.c

334

return PUD_SIZE - PMD_SIZE;

arch/arm64/mm/hugetlbpage.c

350

case PUD_SIZE:

arch/arm64/mm/hugetlbpage.c

52

case PUD_SIZE:

arch/arm64/mm/kasan_init.c

184

#define SHADOW_ALIGN PUD_SIZE

arch/arm64/mm/mmu.c

1526

PUD_SIZE, altmap);

arch/arm64/mm/mmu.c

1911

end = addr + PUD_SIZE;

arch/arm64/mm/mmu.c

703

if (ALIGN_DOWN(addr, PUD_SIZE) == addr)

arch/arm64/mm/pageattr.c

40

if (WARN_ON_ONCE((next - addr) != PUD_SIZE))

arch/loongarch/include/asm/pgtable.h

39

#define PUD_MASK (~(PUD_SIZE-1))

arch/mips/include/asm/pgtable-64.h

61

#define PUD_MASK (~(PUD_SIZE-1))

arch/powerpc/include/asm/book3s/64/hash.h

203

nb = SZ_16G / PUD_SIZE;

arch/powerpc/include/asm/book3s/64/pgtable.h

215

#define PUD_MASK (~(PUD_SIZE-1))

arch/powerpc/include/asm/book3s/64/pgtable.h

294

return PUD_SIZE;

arch/powerpc/include/asm/nohash/64/pgtable-4k.h

37

#define PUD_MASK (~(PUD_SIZE-1))

arch/powerpc/include/asm/nohash/pgtable.h

78

else if (sz < PUD_SIZE)

arch/powerpc/include/asm/nohash/pgtable.h

81

pdsize = PUD_SIZE;

arch/powerpc/kvm/book3s_64_mmu_radix.c

1374

gpa = (gpa & PUD_MASK) + PUD_SIZE;

arch/powerpc/kvm/book3s_64_mmu_radix.c

873

(gpa & (PUD_SIZE - PAGE_SIZE)) ==

arch/powerpc/kvm/book3s_64_mmu_radix.c

874

(hva & (PUD_SIZE - PAGE_SIZE))) {

arch/powerpc/mm/book3s64/radix_hugetlbpage.c

38

if (end - start >= PUD_SIZE)

arch/powerpc/mm/book3s64/radix_pgtable.c

159

if (map_page_size == PUD_SIZE) {

arch/powerpc/mm/book3s64/radix_pgtable.c

1646

flush_tlb_kernel_range(addr, addr + PUD_SIZE);

arch/powerpc/mm/book3s64/radix_pgtable.c

326

if (IS_ALIGNED(addr, PUD_SIZE) && gap >= PUD_SIZE &&

arch/powerpc/mm/book3s64/radix_pgtable.c

328

mapping_size = PUD_SIZE;

arch/powerpc/mm/book3s64/radix_pgtable.c

876

if (!IS_ALIGNED(addr, PUD_SIZE) ||

arch/powerpc/mm/book3s64/radix_pgtable.c

877

!IS_ALIGNED(next, PUD_SIZE)) {

arch/powerpc/mm/book3s64/radix_pgtable.c

93

if (map_page_size == PUD_SIZE) {

arch/powerpc/mm/hugetlbpage.c

59

if (!mm_pmd_folded(mm) && sz >= PUD_SIZE)

arch/powerpc/mm/pgtable.c

369

else if (sz < PUD_SIZE)

arch/powerpc/mm/pgtable.c

372

pdsize = PUD_SIZE;

arch/powerpc/mm/ptdump/hashpagetable.c

435

addr = start + i * PUD_SIZE;

arch/riscv/include/asm/pgtable-64.h

37

#define PUD_MASK (~(PUD_SIZE - 1))

arch/riscv/kvm/mmu.c

276

WARN_ON(size != PAGE_SIZE && size != PMD_SIZE && size != PUD_SIZE);

arch/riscv/kvm/mmu.c

299

WARN_ON(size != PAGE_SIZE && size != PMD_SIZE && size != PUD_SIZE);

arch/riscv/kvm/mmu.c

403

size = PUD_SIZE;

arch/riscv/kvm/mmu.c

498

if (vma_pagesize == PMD_SIZE || vma_pagesize == PUD_SIZE)

arch/riscv/kvm/mmu.c

512

if (vma_pagesize != PUD_SIZE &&

arch/riscv/mm/hugetlbpage.c

104

if (sz == PUD_SIZE)

arch/riscv/mm/hugetlbpage.c

134

case PUD_SIZE:

arch/riscv/mm/hugetlbpage.c

135

return P4D_SIZE - PUD_SIZE;

arch/riscv/mm/hugetlbpage.c

138

return PUD_SIZE - PMD_SIZE;

arch/riscv/mm/hugetlbpage.c

226

else if (sz >= PUD_SIZE)

arch/riscv/mm/hugetlbpage.c

420

else if (IS_ENABLED(CONFIG_64BIT) && size == PUD_SIZE)

arch/riscv/mm/hugetlbpage.c

51

if (sz == PUD_SIZE) {

arch/riscv/mm/init.c

1105

nr_pos = (PUD_SIZE - kernel_size) / PMD_SIZE;

arch/riscv/mm/init.c

1175

BUG_ON(PUD_SIZE - (kernel_map.virt_addr & (PUD_SIZE - 1)) < kernel_map.size);

arch/riscv/mm/init.c

1194

(uintptr_t)fixmap_pmd, PUD_SIZE, PAGE_TABLE);

arch/riscv/mm/init.c

1205

(uintptr_t)trampoline_pmd, PUD_SIZE, PAGE_TABLE);

arch/riscv/mm/init.c

1717

free_vmemmap_storage(pud_page(pud), PUD_SIZE, altmap);

arch/riscv/mm/init.c

640

if (sz == PUD_SIZE) {

arch/riscv/mm/init.c

752

!(pa & (PUD_SIZE - 1)) && !(va & (PUD_SIZE - 1)) && size >= PUD_SIZE)

arch/riscv/mm/init.c

753

return PUD_SIZE;

arch/riscv/mm/init.c

880

PUD_SIZE, PAGE_TABLE);

arch/riscv/mm/kasan_init.c

102

memset(__va(phys_addr), KASAN_SHADOW_INIT, PUD_SIZE);

arch/riscv/mm/kasan_init.c

181

if (IS_ALIGNED(vaddr, PUD_SIZE) && (next - vaddr) >= PUD_SIZE) {

arch/riscv/mm/kasan_init.c

252

if (pud_none(pudp_get(pudp)) && IS_ALIGNED(vaddr, PUD_SIZE) &&

arch/riscv/mm/kasan_init.c

253

(next - vaddr) >= PUD_SIZE) {

arch/riscv/mm/kasan_init.c

97

if (pud_none(pudp_get(pudp)) && IS_ALIGNED(vaddr, PUD_SIZE) &&

arch/riscv/mm/kasan_init.c

98

(next - vaddr) >= PUD_SIZE) {

arch/riscv/mm/kasan_init.c

99

phys_addr = memblock_phys_alloc(PUD_SIZE, PUD_SIZE);

arch/riscv/mm/pageattr.c

147

if (next - vaddr >= PUD_SIZE &&

arch/riscv/mm/pageattr.c

218

pfn_pud(pfn + ((i * PUD_SIZE) >> PAGE_SHIFT), prot));

arch/riscv/mm/pgtable.c

95

flush_tlb_kernel_range(addr, addr + PUD_SIZE);

arch/riscv/mm/tlbflush.c

190

else if (stride_size >= PUD_SIZE)

arch/riscv/mm/tlbflush.c

191

stride_size = PUD_SIZE;

arch/riscv/mm/tlbflush.c

221

start, end - start, PUD_SIZE);

arch/s390/boot/vmem.c

163

IS_ALIGNED(addr, PUD_SIZE) && end - addr >= PUD_SIZE) {

arch/s390/boot/vmem.c

307

!IS_ALIGNED(addr, PUD_SIZE) || (size < PUD_SIZE))

arch/s390/boot/vmem.c

311

if (!IS_ALIGNED(pa, PUD_SIZE))

arch/s390/mm/hugetlbpage.c

194

if (sz == PUD_SIZE)

arch/s390/mm/hugetlbpage.c

216

if (sz == PUD_SIZE)

arch/s390/mm/hugetlbpage.c

229

else if (cpu_has_edat2() && size == PUD_SIZE)

arch/s390/mm/pageattr.c

267

need_split |= !!(addr + PUD_SIZE > next);

arch/s390/mm/vmem.c

331

if (IS_ALIGNED(addr, PUD_SIZE) &&

arch/s390/mm/vmem.c

332

IS_ALIGNED(next, PUD_SIZE)) {

arch/s390/mm/vmem.c

334

vmem_free_pages(pud_deref(*pud), get_order(PUD_SIZE), altmap);

arch/s390/mm/vmem.c

343

if (IS_ALIGNED(addr, PUD_SIZE) &&

arch/s390/mm/vmem.c

344

IS_ALIGNED(next, PUD_SIZE) &&

arch/sparc/include/asm/pgtable_64.h

61

#define PUD_MASK (~(PUD_SIZE-1))

arch/sparc/mm/hugetlbpage.c

203

if (sz >= PUD_SIZE)

arch/sparc/mm/hugetlbpage.c

250

if (size >= PUD_SIZE)

arch/sparc/mm/hugetlbpage.c

293

if (size >= PUD_SIZE)

arch/sparc/mm/init_64.c

1683

return vstart + PUD_SIZE;

arch/sparc/mm/init_64.c

1693

pte_val += PUD_SIZE;

arch/sparc/mm/init_64.c

1694

vstart += PUD_SIZE;

arch/sparc/mm/init_64.c

1703

if (guard && !(vstart & ~PUD_MASK) && (vend - vstart) >= PUD_SIZE)

arch/sparc/mm/init_64.c

423

if (hugepage_size >= PUD_SIZE) {

arch/um/include/asm/pgtable-4level.h

24

#define PUD_MASK (~(PUD_SIZE-1))

arch/x86/boot/compressed/kaslr.c

209

if (memparse(p, &p) != PUD_SIZE) {

arch/x86/boot/compressed/kaslr.c

494

pud_start = ALIGN(region->start, PUD_SIZE);

arch/x86/boot/compressed/kaslr.c

495

pud_end = ALIGN_DOWN(region->start + region->size, PUD_SIZE);

arch/x86/boot/startup/sme.c

269

entries += (DIV_ROUND_UP(len, PUD_SIZE) + 1) * sizeof(pmd_t) * PTRS_PER_PMD;

arch/x86/boot/startup/sme.c

280

tables += DIV_ROUND_UP(entries, PUD_SIZE) * sizeof(pmd_t) * PTRS_PER_PMD;

arch/x86/include/asm/pgtable_64_types.h

85

#define PUD_MASK (~(PUD_SIZE - 1))

arch/x86/kernel/head64.c

230

BUILD_BUG_ON(MODULES_LEN + KERNEL_IMAGE_SIZE > 2*PUD_SIZE);

arch/x86/mm/hugetlbpage.c

28

else if (size == PUD_SIZE && boot_cpu_has(X86_FEATURE_GBPAGES))

arch/x86/mm/init.c

367

unsigned long start = round_down(mr[i].start, PUD_SIZE);

arch/x86/mm/init.c

368

unsigned long end = round_up(mr[i].end, PUD_SIZE);

arch/x86/mm/init.c

439

end_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));

arch/x86/mm/init.c

452

start_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));

arch/x86/mm/init.c

453

end_pfn = round_down(limit_pfn, PFN_DOWN(PUD_SIZE));

arch/x86/mm/init_64.c

1199

IS_ALIGNED(addr, PUD_SIZE) &&

arch/x86/mm/init_64.c

1200

IS_ALIGNED(next, PUD_SIZE)) {

arch/x86/mm/init_64.c

622

paddr_next = (paddr & PUD_MASK) + PUD_SIZE;

arch/x86/mm/kasan_init_64.c

82

((end - addr) == PUD_SIZE) &&

arch/x86/mm/kasan_init_64.c

83

IS_ALIGNED(addr, PUD_SIZE)) {

arch/x86/mm/kasan_init_64.c

84

p = early_alloc(PUD_SIZE, nid, false);

arch/x86/mm/kasan_init_64.c

87

memblock_free(p, PUD_SIZE);

arch/x86/mm/kaslr.c

166

vaddr = round_up(vaddr + 1, PUD_SIZE);

arch/x86/mm/pat/set_memory.c

1504

if (start & (PUD_SIZE - 1)) {

arch/x86/mm/pat/set_memory.c

1505

unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;

arch/x86/mm/pat/set_memory.c

1517

while (end - start >= PUD_SIZE) {

arch/x86/mm/pat/set_memory.c

1522

unmap_pmd_range(pud, start, start + PUD_SIZE);

arch/x86/mm/pat/set_memory.c

1524

start += PUD_SIZE;

arch/x86/mm/pat/set_memory.c

1667

if (start & (PUD_SIZE - 1)) {

arch/x86/mm/pat/set_memory.c

1669

unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;

arch/x86/mm/pat/set_memory.c

1702

while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) {

arch/x86/mm/pat/set_memory.c

1706

start += PUD_SIZE;

arch/x86/mm/pat/set_memory.c

1707

cpa->pfn += PUD_SIZE >> PAGE_SHIFT;

arch/x86/mm/pat/set_memory.c

1708

cur_pages += PUD_SIZE >> PAGE_SHIFT;

arch/x86/mm/pgtable.c

639

mtrr_type_lookup(addr, addr + PUD_SIZE, &uniform);

arch/x86/mm/pti.c

345

addr = round_up(addr + 1, PUD_SIZE);

arch/x86/xen/mmu_pv.c

1143

xen_free_ro_pages(pa, PUD_SIZE);

arch/x86/xen/mmu_pv.c

1967

n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT;

drivers/dax/dax-private.h

120

if (align == PUD_SIZE && IS_ENABLED(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD))

drivers/dax/device.c

196

unsigned int fault_size = PUD_SIZE;

drivers/dax/device.c

202

if (dev_dax->align > PUD_SIZE) {

drivers/dax/device.c

215

(pud_addr + PUD_SIZE) > vmf->vma->vm_end)

drivers/dax/device.c

219

phys = dax_pgoff_to_phys(dev_dax, pgoff, PUD_SIZE);

drivers/hv/mshv_vtl_main.c

1247

if (can_fault(vmf, PUD_SIZE, &pfn))

include/asm-generic/pgtable-nopud.h

21

#define PUD_MASK (~(PUD_SIZE-1))

include/asm-generic/tlb.h

686

else if (_sz >= PUD_SIZE) \

include/asm-generic/tlb.h

803

tlb_flush_pmd_range(tlb, addr & PUD_MASK, PUD_SIZE);

include/linux/hugetlb.h

1011

if (size >= PUD_SIZE)

include/linux/pgtable.h

1415

({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \

include/linux/pgtable.h

2284

#define pud_leaf_size(x) PUD_SIZE

mm/debug_vm_pgtable.c

1118

phys_align_check(pstart, pend, PUD_SIZE, &phys,

mm/debug_vm_pgtable.c

1122

if (args->fixed_alignment == PUD_SIZE)

mm/debug_vm_pgtable.c

460

args->fixed_alignment < PUD_SIZE)

mm/hugetlb.c

4786

unsigned long ceil = floor + PUD_SIZE;

mm/hugetlb.c

6800

unsigned long s_end = sbase + PUD_SIZE;

mm/hugetlb.c

6824

unsigned long end = start + PUD_SIZE;

mm/hugetlb.c

6850

unsigned long v_start = ALIGN(vma->vm_start, PUD_SIZE),

mm/hugetlb.c

6851

v_end = ALIGN_DOWN(vma->vm_end, PUD_SIZE);

mm/hugetlb.c

6863

*start = ALIGN_DOWN(*start, PUD_SIZE);

mm/hugetlb.c

6866

*end = ALIGN(*end, PUD_SIZE);

mm/hugetlb.c

7029

if (sz == PUD_SIZE) {

mm/hugetlb.c

7074

if (sz == PUD_SIZE)

mm/hugetlb.c

7097

if (hp_size == PUD_SIZE)

mm/hugetlb.c

7098

return P4D_SIZE - PUD_SIZE;

mm/hugetlb.c

7100

return PUD_SIZE - PMD_SIZE;

mm/hugetlb.c

7112

return PUD_SIZE - PMD_SIZE;

mm/hugetlb.c

7296

for (address = start; address < end; address += PUD_SIZE) {

mm/hugetlb.c

7323

hugetlb_unshare_pmds(vma, ALIGN(vma->vm_start, PUD_SIZE),

mm/hugetlb.c

7324

ALIGN_DOWN(vma->vm_end, PUD_SIZE),

mm/kasan/init.c

152

if (IS_ALIGNED(addr, PUD_SIZE) && end - addr >= PUD_SIZE) {

mm/kasan/init.c

406

if (IS_ALIGNED(addr, PUD_SIZE) &&

mm/kasan/init.c

407

IS_ALIGNED(next, PUD_SIZE)) {

mm/mprotect.c

554

if ((next - addr != PUD_SIZE) ||

mm/mremap.c

462

flush_tlb_range(vma, pmc->old_addr, pmc->old_addr + PUD_SIZE);

mm/mremap.c

558

size = PUD_SIZE;

mm/mremap.c

841

} else if (IS_ENABLED(CONFIG_HAVE_MOVE_PUD) && extent == PUD_SIZE) {

mm/page_table_check.c

179

page_table_check_clear(pud_pfn(pud), PUD_SIZE >> PAGE_SHIFT);

mm/page_table_check.c

252

unsigned long stride = PUD_SIZE >> PAGE_SHIFT;

mm/page_table_check.c

259

__page_table_check_pud_clear(mm, addr + PUD_SIZE * i, *(pudp + i));

mm/page_vma_mapped.c

233

step_forward(pvmw, PUD_SIZE);

mm/pagewalk.c

939

entry_size = PUD_SIZE;

mm/vmalloc.c

204

if ((end - addr) != PUD_SIZE)

mm/vmalloc.c

207

if (!IS_ALIGNED(addr, PUD_SIZE))

mm/vmalloc.c

210

if (!IS_ALIGNED(phys_addr, PUD_SIZE))

mm/vmalloc.c

440

WARN_ON(next - addr < PUD_SIZE);

mm/vmscan.c

3762

if (i < PTRS_PER_PUD && get_next_vma(P4D_MASK, PUD_SIZE, args, &start, &end))