PSR_MODE_EL2h
{ PSR_MODE_EL2h, "EL2h" }, \
case PSR_MODE_EL2h:
(PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL2h)
direct_inject |= (mode == PSR_MODE_EL2h || mode == PSR_MODE_EL2t);
case PSR_MODE_EL2h:
if (mode != PSR_MODE_EL2t && mode != PSR_MODE_EL2h) {
case PSR_MODE_EL2h:
enter_exception64(vcpu, PSR_MODE_EL2h, except_type_sync);
enter_exception64(vcpu, PSR_MODE_EL2h, except_type_irq);
enter_exception64(vcpu, PSR_MODE_EL2h, except_type_serror);
case PSR_MODE_EL2h:
pstate = PSR_MODE_EL2h | PSR_IL_BIT;
case PSR_MODE_EL2h:
mode = PSR_MODE_EL2h;
case PSR_MODE_EL2h:
return PSR_MODE_EL2h;
return vcpu_el2_tge_is_set(vcpu) ? PSR_MODE_EL2h : PSR_MODE_EL1h;
if (exception_target_el(vcpu) == PSR_MODE_EL2h)
if (exception_target_el(vcpu) == PSR_MODE_EL2h)
#define VCPU_RESET_PSTATE_EL2 (PSR_MODE_EL2h | PSR_A_BIT | PSR_I_BIT | \
case PSR_MODE_EL2h: