PSR_MODE_EL1h
regs->pstate = PSR_MODE_EL1h;
(_regs)->pstate = PSR_MODE_EL1h; \
{ PSR_MODE_EL1h, "EL1h" }, \
(regs)->pstate = PSR_MODE_EL1h; \
(PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1h)
childregs->pstate = PSR_MODE_EL1h | PSR_IL_BIT;
mode == PSR_MODE_EL1h))) {
case PSR_MODE_EL1h:
case PSR_MODE_EL1h:
enter_exception64(vcpu, PSR_MODE_EL1h, except_type_sync);
enter_exception64(vcpu, PSR_MODE_EL1h, except_type_serror);
if (target_mode == PSR_MODE_EL1h)
mode = PSR_MODE_EL1h;
new_spsr |= PSR_MODE_EL1h;
mode = PSR_MODE_EL1h;
case PSR_MODE_EL1h:
return PSR_MODE_EL1h;
case PSR_MODE_EL1h:
return PSR_MODE_EL1h;
return vcpu_el2_tge_is_set(vcpu) ? PSR_MODE_EL2h : PSR_MODE_EL1h;
if (exception_target_el(vcpu) == PSR_MODE_EL1h)
if (exception_target_el(vcpu) == PSR_MODE_EL1h)
if (exception_target_el(vcpu) == PSR_MODE_EL1h)
#define VCPU_RESET_PSTATE_EL1 (PSR_MODE_EL1h | PSR_A_BIT | PSR_I_BIT | \
case PSR_MODE_EL1h: