drivers/gpu/drm/gma500/cdv_intel_dp.c

416

u32 pp, idle_on_mask = PP_ON | PP_SEQUENCE_NONE;

drivers/gpu/drm/gma500/cdv_intel_dp.c

442

u32 pp, idle_off_mask = PP_ON ;

drivers/gpu/drm/gma500/cdv_intel_lvds.c

122

} while ((pp_status & PP_ON) == 0);

drivers/gpu/drm/gma500/cdv_intel_lvds.c

133

} while (pp_status & PP_ON);

drivers/gpu/drm/gma500/oaktrail_lvds.c

51

} while ((pp_status & (PP_ON | PP_READY)) == PP_READY);

drivers/gpu/drm/gma500/oaktrail_lvds.c

62

} while (pp_status & PP_ON);

drivers/gpu/drm/gma500/psb_intel_lvds.c

225

} while ((pp_status & PP_ON) == 0);

drivers/gpu/drm/gma500/psb_intel_lvds.c

236

} while (pp_status & PP_ON);

drivers/gpu/drm/gma500/psb_intel_lvds.c

324

} while ((pp_status & PP_ON) == 0);

drivers/gpu/drm/gma500/psb_intel_lvds.c

330

} while (pp_status & PP_ON);

drivers/gpu/drm/i915/display/intel_display_power.c

1223

intel_de_read(display, PP_STATUS(display, 0)) & PP_ON,

drivers/gpu/drm/i915/display/intel_lvds.c

332

if (intel_de_wait_for_set_ms(display, PP_STATUS(display, 0), PP_ON, 5000))

drivers/gpu/drm/i915/display/intel_lvds.c

348

if (intel_de_wait_for_clear_ms(display, PP_STATUS(display, 0), PP_ON, 1000))

drivers/gpu/drm/i915/display/intel_pps.c

282

return intel_de_read(display, PP_STATUS(display, pps_idx)) & PP_ON;

drivers/gpu/drm/i915/display/intel_pps.c

556

return (intel_de_read(display, _pp_stat_reg(intel_dp)) & PP_ON) != 0;

drivers/gpu/drm/i915/display/intel_pps.c

594

#define IDLE_ON_MASK (PP_ON | PP_SEQUENCE_MASK | 0 | PP_SEQUENCE_STATE_MASK)

drivers/gpu/drm/i915/display/intel_pps.c

595

#define IDLE_ON_VALUE (PP_ON | PP_SEQUENCE_NONE | 0 | PP_SEQUENCE_STATE_ON_IDLE)

drivers/gpu/drm/i915/display/intel_pps.c

597

#define IDLE_OFF_MASK (PP_ON | PP_SEQUENCE_MASK | 0 | 0)

drivers/gpu/drm/i915/display/intel_pps.c

600

#define IDLE_CYCLE_MASK (PP_ON | PP_SEQUENCE_MASK | PP_CYCLE_DELAY_ACTIVE | PP_SEQUENCE_STATE_MASK)

drivers/gpu/drm/i915/gvt/handlers.c

402

vgpu_vreg_t(vgpu, PCH_PP_STATUS) |= PP_ON;

drivers/gpu/drm/i915/gvt/handlers.c

409

~(PP_ON | PP_SEQUENCE_POWER_DOWN