PSC
NODE_CHK("ipg", clks[MPC512x_CLK_PSC0 + idx], 0, PSC);
NODE_CHK("mclk", clks[MPC512x_CLK_PSC0_MCLK + idx], 0, PSC);
MT6357_TOP_GEN(PSC),
MT6358_TOP_GEN(PSC),
MT6359_TOP_GEN(PSC),
return in_be16(&PSC(port)->mpc52xx_psc_status);
return in_8(&PSC(port)->mpc52xx_psc_ipcr);
out_8(&PSC(port)->command, cmd);
out_8(&PSC(port)->command, MPC52xx_PSC_SEL_MODE_REG_1);
out_8(&PSC(port)->mode, mr1);
out_8(&PSC(port)->mode, mr2);
out_8(&PSC(port)->op1, MPC52xx_PSC_OP_RTS);
out_8(&PSC(port)->op0, MPC52xx_PSC_OP_RTS);
struct mpc52xx_psc __iomem *psc = PSC(port);
out_be32(&PSC(port)->sicr, val);
out_be16(&PSC(port)->mpc52xx_psc_imr, val);
out_8(&PSC(port)->command, MPC52xx_PSC_SEL_MODE_REG_1);
return in_8(&PSC(port)->mode);
#define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
struct mpc52xx_psc __iomem *psc = PSC(port);
return in_be16(&PSC(port)->mpc52xx_psc_status)
return in_be16(&PSC(port)->mpc52xx_psc_status)
return in_be16(&PSC(port)->mpc52xx_psc_isr)
return in_be16(&PSC(port)->mpc52xx_psc_isr)
u16 sts = in_be16(&PSC(port)->mpc52xx_psc_status);
out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
mpc52xx_set_divisor(PSC(port), 0xdd00, divisor);
mpc52xx_set_divisor(PSC(port), prescaler, divisor);
#define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
out_be16(&PSC(port)->mpc52xx_psc_clock_select, 0xdd00);
mpc52xx_set_divisor(PSC(port), 0xdd00, divisor);