Symbol: PRIV_STATE
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
6782
tmp = REG_SET_FIELD(tmp, CP_GFX_MQD_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
6984
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
4118
tmp = REG_SET_FIELD(tmp, CP_GFX_MQD_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
4316
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
2988
tmp = REG_SET_FIELD(tmp, CP_GFX_MQD_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
3186
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
2187
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
4461
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
3637
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
1913
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
1176
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
1334
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
1259
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c
345
PRIV_STATE |
drivers/gpu/drm/radeon/cik.c
4672
PRIV_STATE | KMD_QUEUE; /* assuming kernel queue control */