arch/powerpc/xmon/ppc-opc.c

3036

{"attn", X(0,256), X_MASK, POWER4|PPCA2, PPC476|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

3037

{"tdlgti", OPTO(2,TOLGT), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3038

{"tdllti", OPTO(2,TOLLT), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3039

{"tdeqi", OPTO(2,TOEQ), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3040

{"tdlgei", OPTO(2,TOLGE), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3041

{"tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3042

{"tdllei", OPTO(2,TOLLE), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3043

{"tdlngi", OPTO(2,TOLNG), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3044

{"tdgti", OPTO(2,TOGT), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3045

{"tdgei", OPTO(2,TOGE), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3046

{"tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3047

{"tdlti", OPTO(2,TOLT), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3048

{"tdlei", OPTO(2,TOLE), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3049

{"tdngi", OPTO(2,TONG), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3050

{"tdnei", OPTO(2,TONE), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3051

{"tdui", OPTO(2,TOU), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3052

{"tdi", OP(2), OP_MASK, PPC64, PPCVLE, {TO, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3054

{"twlgti", OPTO(3,TOLGT), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3055

{"tlgti", OPTO(3,TOLGT), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3056

{"twllti", OPTO(3,TOLLT), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3057

{"tllti", OPTO(3,TOLLT), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3058

{"tweqi", OPTO(3,TOEQ), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3059

{"teqi", OPTO(3,TOEQ), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3060

{"twlgei", OPTO(3,TOLGE), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3061

{"tlgei", OPTO(3,TOLGE), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3062

{"twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3063

{"tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3064

{"twllei", OPTO(3,TOLLE), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3065

{"tllei", OPTO(3,TOLLE), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3066

{"twlngi", OPTO(3,TOLNG), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3067

{"tlngi", OPTO(3,TOLNG), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3068

{"twgti", OPTO(3,TOGT), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3069

{"tgti", OPTO(3,TOGT), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3070

{"twgei", OPTO(3,TOGE), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3071

{"tgei", OPTO(3,TOGE), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3072

{"twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3073

{"tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3074

{"twlti", OPTO(3,TOLT), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3075

{"tlti", OPTO(3,TOLT), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3076

{"twlei", OPTO(3,TOLE), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3077

{"tlei", OPTO(3,TOLE), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3078

{"twngi", OPTO(3,TONG), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3079

{"tngi", OPTO(3,TONG), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3080

{"twnei", OPTO(3,TONE), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3081

{"tnei", OPTO(3,TONE), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3082

{"twui", OPTO(3,TOU), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3083

{"tui", OPTO(3,TOU), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3084

{"twi", OP(3), OP_MASK, PPCCOM, PPCVLE, {TO, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3085

{"ti", OP(3), OP_MASK, PWRCOM, PPCVLE, {TO, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3824

{"mulli", OP(7), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3825

{"muli", OP(7), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3827

{"subfic", OP(8), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3828

{"sfi", OP(8), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3830

{"dozi", OP(9), OP_MASK, M601, PPCVLE, {RT, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3832

{"cmplwi", OPL(10,0), OPL_MASK, PPCCOM, PPCVLE, {OBF, RA, UISIGNOPT}},

arch/powerpc/xmon/ppc-opc.c

3833

{"cmpldi", OPL(10,1), OPL_MASK, PPC64, PPCVLE, {OBF, RA, UISIGNOPT}},

arch/powerpc/xmon/ppc-opc.c

3834

{"cmpli", OP(10), OP_MASK, PPC, PPCVLE, {BF, L32OPT, RA, UISIGNOPT}},

arch/powerpc/xmon/ppc-opc.c

3835

{"cmpli", OP(10), OP_MASK, PWRCOM, PPC|PPCVLE, {BF, RA, UISIGNOPT}},

arch/powerpc/xmon/ppc-opc.c

3837

{"cmpwi", OPL(11,0), OPL_MASK, PPCCOM, PPCVLE, {OBF, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3838

{"cmpdi", OPL(11,1), OPL_MASK, PPC64, PPCVLE, {OBF, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3839

{"cmpi", OP(11), OP_MASK, PPC, PPCVLE, {BF, L32OPT, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3840

{"cmpi", OP(11), OP_MASK, PWRCOM, PPC|PPCVLE, {BF, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3842

{"addic", OP(12), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3843

{"ai", OP(12), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3844

{"subic", OP(12), OP_MASK, PPCCOM, PPCVLE, {RT, RA, NSI}},

arch/powerpc/xmon/ppc-opc.c

3846

{"addic.", OP(13), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3847

{"ai.", OP(13), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

3848

{"subic.", OP(13), OP_MASK, PPCCOM, PPCVLE, {RT, RA, NSI}},

arch/powerpc/xmon/ppc-opc.c

3850

{"li", OP(14), DRA_MASK, PPCCOM, PPCVLE, {RT, SI}},

arch/powerpc/xmon/ppc-opc.c

3851

{"lil", OP(14), DRA_MASK, PWRCOM, PPCVLE, {RT, SI}},

arch/powerpc/xmon/ppc-opc.c

3852

{"addi", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, SI}},

arch/powerpc/xmon/ppc-opc.c

3853

{"cal", OP(14), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

3854

{"subi", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, NSI}},

arch/powerpc/xmon/ppc-opc.c

3855

{"la", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

3857

{"lis", OP(15), DRA_MASK, PPCCOM, PPCVLE, {RT, SISIGNOPT}},

arch/powerpc/xmon/ppc-opc.c

3858

{"liu", OP(15), DRA_MASK, PWRCOM, PPCVLE, {RT, SISIGNOPT}},

arch/powerpc/xmon/ppc-opc.c

3859

{"addis", OP(15), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, SISIGNOPT}},

arch/powerpc/xmon/ppc-opc.c

3860

{"cau", OP(15), OP_MASK, PWRCOM, PPCVLE, {RT, RA0, SISIGNOPT}},

arch/powerpc/xmon/ppc-opc.c

3861

{"subis", OP(15), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, NSISIGNOPT}},

arch/powerpc/xmon/ppc-opc.c

3863

{"bdnz-", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDM}},

arch/powerpc/xmon/ppc-opc.c

3864

{"bdnz+", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDP}},

arch/powerpc/xmon/ppc-opc.c

3865

{"bdnz", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BD}},

arch/powerpc/xmon/ppc-opc.c

3866

{"bdn", BBO(16,BODNZ,0,0), BBOATBI_MASK, PWRCOM, PPCVLE, {BD}},

arch/powerpc/xmon/ppc-opc.c

3867

{"bdnzl-", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDM}},

arch/powerpc/xmon/ppc-opc.c

3868

{"bdnzl+", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDP}},

arch/powerpc/xmon/ppc-opc.c

3869

{"bdnzl", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BD}},

arch/powerpc/xmon/ppc-opc.c

3870

{"bdnl", BBO(16,BODNZ,0,1), BBOATBI_MASK, PWRCOM, PPCVLE, {BD}},

arch/powerpc/xmon/ppc-opc.c

3871

{"bdnza-", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDMA}},

arch/powerpc/xmon/ppc-opc.c

3872

{"bdnza+", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDPA}},

arch/powerpc/xmon/ppc-opc.c

3873

{"bdnza", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDA}},

arch/powerpc/xmon/ppc-opc.c

3874

{"bdna", BBO(16,BODNZ,1,0), BBOATBI_MASK, PWRCOM, PPCVLE, {BDA}},

arch/powerpc/xmon/ppc-opc.c

3875

{"bdnzla-", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDMA}},

arch/powerpc/xmon/ppc-opc.c

3876

{"bdnzla+", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDPA}},

arch/powerpc/xmon/ppc-opc.c

3877

{"bdnzla", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDA}},

arch/powerpc/xmon/ppc-opc.c

3878

{"bdnla", BBO(16,BODNZ,1,1), BBOATBI_MASK, PWRCOM, PPCVLE, {BDA}},

arch/powerpc/xmon/ppc-opc.c

3879

{"bdz-", BBO(16,BODZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDM}},

arch/powerpc/xmon/ppc-opc.c

3880

{"bdz+", BBO(16,BODZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDP}},

arch/powerpc/xmon/ppc-opc.c

3881

{"bdz", BBO(16,BODZ,0,0), BBOATBI_MASK, COM, PPCVLE, {BD}},

arch/powerpc/xmon/ppc-opc.c

3882

{"bdzl-", BBO(16,BODZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDM}},

arch/powerpc/xmon/ppc-opc.c

3883

{"bdzl+", BBO(16,BODZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDP}},

arch/powerpc/xmon/ppc-opc.c

3884

{"bdzl", BBO(16,BODZ,0,1), BBOATBI_MASK, COM, PPCVLE, {BD}},

arch/powerpc/xmon/ppc-opc.c

3885

{"bdza-", BBO(16,BODZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDMA}},

arch/powerpc/xmon/ppc-opc.c

3886

{"bdza+", BBO(16,BODZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDPA}},

arch/powerpc/xmon/ppc-opc.c

3887

{"bdza", BBO(16,BODZ,1,0), BBOATBI_MASK, COM, PPCVLE, {BDA}},

arch/powerpc/xmon/ppc-opc.c

3888

{"bdzla-", BBO(16,BODZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDMA}},

arch/powerpc/xmon/ppc-opc.c

3889

{"bdzla+", BBO(16,BODZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDPA}},

arch/powerpc/xmon/ppc-opc.c

3890

{"bdzla", BBO(16,BODZ,1,1), BBOATBI_MASK, COM, PPCVLE, {BDA}},

arch/powerpc/xmon/ppc-opc.c

3892

{"bge-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3893

{"bge+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3894

{"bge", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3895

{"bnl-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3896

{"bnl+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3897

{"bnl", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3898

{"bgel-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3899

{"bgel+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3900

{"bgel", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3901

{"bnll-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3902

{"bnll+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3903

{"bnll", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3904

{"bgea-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3905

{"bgea+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3906

{"bgea", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3907

{"bnla-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3908

{"bnla+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3909

{"bnla", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3910

{"bgela-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3911

{"bgela+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3912

{"bgela", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3913

{"bnlla-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3914

{"bnlla+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3915

{"bnlla", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3916

{"ble-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3917

{"ble+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3918

{"ble", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3919

{"bng-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3920

{"bng+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3921

{"bng", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3922

{"blel-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3923

{"blel+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3924

{"blel", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3925

{"bngl-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3926

{"bngl+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3927

{"bngl", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3928

{"blea-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3929

{"blea+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3930

{"blea", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3931

{"bnga-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3932

{"bnga+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3933

{"bnga", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3934

{"blela-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3935

{"blela+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3936

{"blela", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3937

{"bngla-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3938

{"bngla+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3939

{"bngla", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3940

{"bne-", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3941

{"bne+", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3942

{"bne", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3943

{"bnel-", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3944

{"bnel+", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3945

{"bnel", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3946

{"bnea-", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3947

{"bnea+", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3948

{"bnea", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3949

{"bnela-", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3950

{"bnela+", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3951

{"bnela", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3952

{"bns-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3953

{"bns+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3954

{"bns", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3955

{"bnu-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3956

{"bnu+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3957

{"bnu", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3958

{"bnsl-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3959

{"bnsl+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3960

{"bnsl", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3961

{"bnul-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3962

{"bnul+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3963

{"bnul", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3964

{"bnsa-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3965

{"bnsa+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3966

{"bnsa", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3967

{"bnua-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3968

{"bnua+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3969

{"bnua", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3970

{"bnsla-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3971

{"bnsla+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3972

{"bnsla", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3973

{"bnula-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3974

{"bnula+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3975

{"bnula", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3977

{"blt-", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3978

{"blt+", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3979

{"blt", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3980

{"bltl-", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3981

{"bltl+", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3982

{"bltl", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3983

{"blta-", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3984

{"blta+", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3985

{"blta", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3986

{"bltla-", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3987

{"bltla+", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3988

{"bltla", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3989

{"bgt-", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3990

{"bgt+", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3991

{"bgt", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3992

{"bgtl-", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

3993

{"bgtl+", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

3994

{"bgtl", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

3995

{"bgta-", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3996

{"bgta+", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

3997

{"bgta", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

3998

{"bgtla-", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

3999

{"bgtla+", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4000

{"bgtla", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

4001

{"beq-", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

4002

{"beq+", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

4003

{"beq", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

4004

{"beql-", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

4005

{"beql+", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

4006

{"beql", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

4007

{"beqa-", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4008

{"beqa+", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4009

{"beqa", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

4010

{"beqla-", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4011

{"beqla+", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4012

{"beqla", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

4013

{"bso-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

4014

{"bso+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

4015

{"bso", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

4016

{"bun-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

4017

{"bun+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

4018

{"bun", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

4019

{"bsol-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

4020

{"bsol+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

4021

{"bsol", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

4022

{"bunl-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},

arch/powerpc/xmon/ppc-opc.c

4023

{"bunl+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},

arch/powerpc/xmon/ppc-opc.c

4024

{"bunl", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},

arch/powerpc/xmon/ppc-opc.c

4025

{"bsoa-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4026

{"bsoa+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4027

{"bsoa", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

4028

{"buna-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4029

{"buna+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4030

{"buna", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

4031

{"bsola-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4032

{"bsola+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4033

{"bsola", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

4034

{"bunla-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4035

{"bunla+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4036

{"bunla", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}},

arch/powerpc/xmon/ppc-opc.c

4038

{"bdnzf-", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4039

{"bdnzf+", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4040

{"bdnzf", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4041

{"bdnzfl-", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4042

{"bdnzfl+", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4043

{"bdnzfl", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4044

{"bdnzfa-", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4045

{"bdnzfa+", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4046

{"bdnzfa", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4047

{"bdnzfla-", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4048

{"bdnzfla+", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4049

{"bdnzfla", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4050

{"bdzf-", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4051

{"bdzf+", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4052

{"bdzf", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4053

{"bdzfl-", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4054

{"bdzfl+", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4055

{"bdzfl", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4056

{"bdzfa-", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4057

{"bdzfa+", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4058

{"bdzfa", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4059

{"bdzfla-", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4060

{"bdzfla+", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4061

{"bdzfla", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4063

{"bf-", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4064

{"bf+", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4065

{"bf", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4066

{"bbf", BBO(16,BOF,0,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4067

{"bfl-", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4068

{"bfl+", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4069

{"bfl", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4070

{"bbfl", BBO(16,BOF,0,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4071

{"bfa-", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4072

{"bfa+", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4073

{"bfa", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4074

{"bbfa", BBO(16,BOF,1,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4075

{"bfla-", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4076

{"bfla+", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4077

{"bfla", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4078

{"bbfla", BBO(16,BOF,1,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4080

{"bdnzt-", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4081

{"bdnzt+", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4082

{"bdnzt", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4083

{"bdnztl-", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4084

{"bdnztl+", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4085

{"bdnztl", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4086

{"bdnzta-", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4087

{"bdnzta+", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4088

{"bdnzta", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4089

{"bdnztla-", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4090

{"bdnztla+", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4091

{"bdnztla", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4092

{"bdzt-", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4093

{"bdzt+", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4094

{"bdzt", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4095

{"bdztl-", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4096

{"bdztl+", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4097

{"bdztl", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4098

{"bdzta-", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4099

{"bdzta+", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4100

{"bdzta", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4101

{"bdztla-", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4102

{"bdztla+", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4103

{"bdztla", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4105

{"bt-", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4106

{"bt+", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4107

{"bt", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4108

{"bbt", BBO(16,BOT,0,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4109

{"btl-", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4110

{"btl+", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4111

{"btl", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4112

{"bbtl", BBO(16,BOT,0,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4113

{"bta-", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4114

{"bta+", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4115

{"bta", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4116

{"bbta", BBO(16,BOT,1,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4117

{"btla-", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4118

{"btla+", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4119

{"btla", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4120

{"bbtla", BBO(16,BOT,1,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4122

{"bc-", B(16,0,0), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4123

{"bc+", B(16,0,0), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4124

{"bc", B(16,0,0), B_MASK, COM, PPCVLE, {BO, BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4125

{"bcl-", B(16,0,1), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDM}},

arch/powerpc/xmon/ppc-opc.c

4126

{"bcl+", B(16,0,1), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDP}},

arch/powerpc/xmon/ppc-opc.c

4127

{"bcl", B(16,0,1), B_MASK, COM, PPCVLE, {BO, BI, BD}},

arch/powerpc/xmon/ppc-opc.c

4128

{"bca-", B(16,1,0), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4129

{"bca+", B(16,1,0), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4130

{"bca", B(16,1,0), B_MASK, COM, PPCVLE, {BO, BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4131

{"bcla-", B(16,1,1), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDMA}},

arch/powerpc/xmon/ppc-opc.c

4132

{"bcla+", B(16,1,1), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDPA}},

arch/powerpc/xmon/ppc-opc.c

4133

{"bcla", B(16,1,1), B_MASK, COM, PPCVLE, {BO, BI, BDA}},

arch/powerpc/xmon/ppc-opc.c

4135

{"svc", SC(17,0,0), SC_MASK, POWER, PPCVLE, {SVC_LEV, FL1, FL2}},

arch/powerpc/xmon/ppc-opc.c

4136

{"svcl", SC(17,0,1), SC_MASK, POWER, PPCVLE, {SVC_LEV, FL1, FL2}},

arch/powerpc/xmon/ppc-opc.c

4137

{"sc", SC(17,1,0), SC_MASK, PPC, PPCVLE, {LEV}},

arch/powerpc/xmon/ppc-opc.c

4138

{"svca", SC(17,1,0), SC_MASK, PWRCOM, PPCVLE, {SV}},

arch/powerpc/xmon/ppc-opc.c

4139

{"svcla", SC(17,1,1), SC_MASK, POWER, PPCVLE, {SV}},

arch/powerpc/xmon/ppc-opc.c

4141

{"b", B(18,0,0), B_MASK, COM, PPCVLE, {LI}},

arch/powerpc/xmon/ppc-opc.c

4142

{"bl", B(18,0,1), B_MASK, COM, PPCVLE, {LI}},

arch/powerpc/xmon/ppc-opc.c

4143

{"ba", B(18,1,0), B_MASK, COM, PPCVLE, {LIA}},

arch/powerpc/xmon/ppc-opc.c

4144

{"bla", B(18,1,1), B_MASK, COM, PPCVLE, {LIA}},

arch/powerpc/xmon/ppc-opc.c

4146

{"mcrf", XL(19,0), XLBB_MASK|(3<<21)|(3<<16), COM, PPCVLE, {BF, BFA}},

arch/powerpc/xmon/ppc-opc.c

4148

{"addpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, DXD}},

arch/powerpc/xmon/ppc-opc.c

4149

{"subpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, NDXD}},

arch/powerpc/xmon/ppc-opc.c

4151

{"bdnzlr", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPCCOM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4152

{"bdnzlr-", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4153

{"bdnzlrl", XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPCCOM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4154

{"bdnzlrl-", XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4155

{"bdnzlr+", XLO(19,BODNZP,16,0), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4156

{"bdnzlrl+", XLO(19,BODNZP,16,1), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4157

{"bdzlr", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPCCOM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4158

{"bdzlr-", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4159

{"bdzlrl", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPCCOM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4160

{"bdzlrl-", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4161

{"bdzlr+", XLO(19,BODZP,16,0), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4162

{"bdzlrl+", XLO(19,BODZP,16,1), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4163

{"blr", XLO(19,BOU,16,0), XLBOBIBB_MASK, PPCCOM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4164

{"br", XLO(19,BOU,16,0), XLBOBIBB_MASK, PWRCOM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4165

{"blrl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PPCCOM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4166

{"brl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PWRCOM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4167

{"bdnzlr-", XLO(19,BODNZM4,16,0), XLBOBIBB_MASK, ISA_V2, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4168

{"bdnzlrl-", XLO(19,BODNZM4,16,1), XLBOBIBB_MASK, ISA_V2, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4169

{"bdnzlr+", XLO(19,BODNZP4,16,0), XLBOBIBB_MASK, ISA_V2, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4170

{"bdnzlrl+", XLO(19,BODNZP4,16,1), XLBOBIBB_MASK, ISA_V2, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4171

{"bdzlr-", XLO(19,BODZM4,16,0), XLBOBIBB_MASK, ISA_V2, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4172

{"bdzlrl-", XLO(19,BODZM4,16,1), XLBOBIBB_MASK, ISA_V2, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4173

{"bdzlr+", XLO(19,BODZP4,16,0), XLBOBIBB_MASK, ISA_V2, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4174

{"bdzlrl+", XLO(19,BODZP4,16,1), XLBOBIBB_MASK, ISA_V2, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4176

{"bgelr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4177

{"bgelr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4178

{"bger", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4179

{"bnllr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4180

{"bnllr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4181

{"bnlr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4182

{"bgelrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4183

{"bgelrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4184

{"bgerl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4185

{"bnllrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4186

{"bnllrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4187

{"bnlrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4188

{"blelr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4189

{"blelr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4190

{"bler", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4191

{"bnglr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4192

{"bnglr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4193

{"bngr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4194

{"blelrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4195

{"blelrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4196

{"blerl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4197

{"bnglrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4198

{"bnglrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4199

{"bngrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4200

{"bnelr", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4201

{"bnelr-", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4202

{"bner", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4203

{"bnelrl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4204

{"bnelrl-", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4205

{"bnerl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4206

{"bnslr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4207

{"bnslr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4208

{"bnsr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4209

{"bnulr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4210

{"bnulr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4211

{"bnslrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4212

{"bnslrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4213

{"bnsrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4214

{"bnulrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4215

{"bnulrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4216

{"bgelr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4217

{"bnllr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4218

{"bgelrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4219

{"bnllrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4220

{"blelr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4221

{"bnglr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4222

{"blelrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4223

{"bnglrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4224

{"bnelr+", XLOCB(19,BOFP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4225

{"bnelrl+", XLOCB(19,BOFP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4226

{"bnslr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4227

{"bnulr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4228

{"bnslrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4229

{"bnulrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4230

{"bgelr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4231

{"bnllr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4232

{"bgelrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4233

{"bnllrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4234

{"blelr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4235

{"bnglr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4236

{"blelrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4237

{"bnglrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4238

{"bnelr-", XLOCB(19,BOFM4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4239

{"bnelrl-", XLOCB(19,BOFM4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4240

{"bnslr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4241

{"bnulr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4242

{"bnslrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4243

{"bnulrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4244

{"bgelr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4245

{"bnllr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4246

{"bgelrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4247

{"bnllrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4248

{"blelr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4249

{"bnglr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4250

{"blelrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4251

{"bnglrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4252

{"bnelr+", XLOCB(19,BOFP4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4253

{"bnelrl+", XLOCB(19,BOFP4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4254

{"bnslr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4255

{"bnulr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4256

{"bnslrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4257

{"bnulrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4258

{"bltlr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4259

{"bltlr-", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4260

{"bltr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4261

{"bltlrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4262

{"bltlrl-", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4263

{"bltrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4264

{"bgtlr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4265

{"bgtlr-", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4266

{"bgtr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4267

{"bgtlrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4268

{"bgtlrl-", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4269

{"bgtrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4270

{"beqlr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4271

{"beqlr-", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4272

{"beqr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4273

{"beqlrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4274

{"beqlrl-", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4275

{"beqrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4276

{"bsolr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4277

{"bsolr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4278

{"bsor", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4279

{"bunlr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4280

{"bunlr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4281

{"bsolrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4282

{"bsolrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4283

{"bsorl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4284

{"bunlrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4285

{"bunlrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4286

{"bltlr+", XLOCB(19,BOTP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4287

{"bltlrl+", XLOCB(19,BOTP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4288

{"bgtlr+", XLOCB(19,BOTP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4289

{"bgtlrl+", XLOCB(19,BOTP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4290

{"beqlr+", XLOCB(19,BOTP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4291

{"beqlrl+", XLOCB(19,BOTP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4292

{"bsolr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4293

{"bunlr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4294

{"bsolrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4295

{"bunlrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4296

{"bltlr-", XLOCB(19,BOTM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4297

{"bltlrl-", XLOCB(19,BOTM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4298

{"bgtlr-", XLOCB(19,BOTM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4299

{"bgtlrl-", XLOCB(19,BOTM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4300

{"beqlr-", XLOCB(19,BOTM4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4301

{"beqlrl-", XLOCB(19,BOTM4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4302

{"bsolr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4303

{"bunlr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4304

{"bsolrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4305

{"bunlrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4306

{"bltlr+", XLOCB(19,BOTP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4307

{"bltlrl+", XLOCB(19,BOTP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4308

{"bgtlr+", XLOCB(19,BOTP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4309

{"bgtlrl+", XLOCB(19,BOTP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4310

{"beqlr+", XLOCB(19,BOTP4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4311

{"beqlrl+", XLOCB(19,BOTP4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4312

{"bsolr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4313

{"bunlr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4314

{"bsolrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4315

{"bunlrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4317

{"bdnzflr", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4318

{"bdnzflr-", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4319

{"bdnzflrl", XLO(19,BODNZF,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4320

{"bdnzflrl-",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4321

{"bdnzflr+", XLO(19,BODNZFP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4322

{"bdnzflrl+",XLO(19,BODNZFP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4323

{"bdzflr", XLO(19,BODZF,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4324

{"bdzflr-", XLO(19,BODZF,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4325

{"bdzflrl", XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4326

{"bdzflrl-", XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4327

{"bdzflr+", XLO(19,BODZFP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4328

{"bdzflrl+", XLO(19,BODZFP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4329

{"bflr", XLO(19,BOF,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4330

{"bflr-", XLO(19,BOF,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4331

{"bbfr", XLO(19,BOF,16,0), XLBOBB_MASK, PWRCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4332

{"bflrl", XLO(19,BOF,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4333

{"bflrl-", XLO(19,BOF,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4334

{"bbfrl", XLO(19,BOF,16,1), XLBOBB_MASK, PWRCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4335

{"bflr+", XLO(19,BOFP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4336

{"bflrl+", XLO(19,BOFP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4337

{"bflr-", XLO(19,BOFM4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4338

{"bflrl-", XLO(19,BOFM4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4339

{"bflr+", XLO(19,BOFP4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4340

{"bflrl+", XLO(19,BOFP4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4341

{"bdnztlr", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4342

{"bdnztlr-", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4343

{"bdnztlrl", XLO(19,BODNZT,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4344

{"bdnztlrl-", XLO(19,BODNZT,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4345

{"bdnztlr+", XLO(19,BODNZTP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4346

{"bdnztlrl+", XLO(19,BODNZTP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4347

{"bdztlr", XLO(19,BODZT,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4348

{"bdztlr-", XLO(19,BODZT,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4349

{"bdztlrl", XLO(19,BODZT,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4350

{"bdztlrl-", XLO(19,BODZT,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4351

{"bdztlr+", XLO(19,BODZTP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4352

{"bdztlrl+", XLO(19,BODZTP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4353

{"btlr", XLO(19,BOT,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4354

{"btlr-", XLO(19,BOT,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4355

{"bbtr", XLO(19,BOT,16,0), XLBOBB_MASK, PWRCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4356

{"btlrl", XLO(19,BOT,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4357

{"btlrl-", XLO(19,BOT,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4358

{"bbtrl", XLO(19,BOT,16,1), XLBOBB_MASK, PWRCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4359

{"btlr+", XLO(19,BOTP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4360

{"btlrl+", XLO(19,BOTP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4361

{"btlr-", XLO(19,BOTM4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4362

{"btlrl-", XLO(19,BOTM4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4363

{"btlr+", XLO(19,BOTP4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4364

{"btlrl+", XLO(19,BOTP4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4366

{"bclr-", XLYLK(19,16,0,0), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},

arch/powerpc/xmon/ppc-opc.c

4367

{"bclrl-", XLYLK(19,16,0,1), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},

arch/powerpc/xmon/ppc-opc.c

4368

{"bclr+", XLYLK(19,16,1,0), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},

arch/powerpc/xmon/ppc-opc.c

4369

{"bclrl+", XLYLK(19,16,1,1), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},

arch/powerpc/xmon/ppc-opc.c

4370

{"bclr", XLLK(19,16,0), XLBH_MASK, PPCCOM, PPCVLE, {BO, BI, BH}},

arch/powerpc/xmon/ppc-opc.c

4371

{"bcr", XLLK(19,16,0), XLBB_MASK, PWRCOM, PPCVLE, {BO, BI}},

arch/powerpc/xmon/ppc-opc.c

4372

{"bclrl", XLLK(19,16,1), XLBH_MASK, PPCCOM, PPCVLE, {BO, BI, BH}},

arch/powerpc/xmon/ppc-opc.c

4373

{"bcrl", XLLK(19,16,1), XLBB_MASK, PWRCOM, PPCVLE, {BO, BI}},

arch/powerpc/xmon/ppc-opc.c

4375

{"rfid", XL(19,18), 0xffffffff, PPC64, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4377

{"crnot", XL(19,33), XL_MASK, PPCCOM, PPCVLE, {BT, BA, BBA}},

arch/powerpc/xmon/ppc-opc.c

4378

{"crnor", XL(19,33), XL_MASK, COM, PPCVLE, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

4379

{"rfmci", X(19,38), 0xffffffff, PPCRFMCI|PPCA2|PPC476, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4381

{"rfdi", XL(19,39), 0xffffffff, E500MC, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4382

{"rfi", XL(19,50), 0xffffffff, COM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4383

{"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300|PPCA2|PPC476, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4385

{"rfsvc", XL(19,82), 0xffffffff, POWER, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4387

{"rfgi", XL(19,102), 0xffffffff, E500MC|PPCA2, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4389

{"crandc", XL(19,129), XL_MASK, COM, PPCVLE, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

4391

{"rfebb", XL(19,146), XLS_MASK, POWER8, PPCVLE, {SXL}},

arch/powerpc/xmon/ppc-opc.c

4393

{"isync", XL(19,150), 0xffffffff, PPCCOM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4394

{"ics", XL(19,150), 0xffffffff, PWRCOM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4396

{"crclr", XL(19,193), XL_MASK, PPCCOM, PPCVLE, {BT, BAT, BBA}},

arch/powerpc/xmon/ppc-opc.c

4397

{"crxor", XL(19,193), XL_MASK, COM, PPCVLE, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

4399

{"dnh", X(19,198), X_MASK, E500MC, PPCVLE, {DUI, DUIS}},

arch/powerpc/xmon/ppc-opc.c

4401

{"crnand", XL(19,225), XL_MASK, COM, PPCVLE, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

4403

{"crand", XL(19,257), XL_MASK, COM, PPCVLE, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

4405

{"hrfid", XL(19,274), 0xffffffff, POWER5|CELL, PPC476|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4407

{"crset", XL(19,289), XL_MASK, PPCCOM, PPCVLE, {BT, BAT, BBA}},

arch/powerpc/xmon/ppc-opc.c

4408

{"creqv", XL(19,289), XL_MASK, COM, PPCVLE, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

4410

{"urfid", XL(19,306), 0xffffffff, POWER9, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4411

{"stop", XL(19,370), 0xffffffff, POWER9, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4413

{"doze", XL(19,402), 0xffffffff, POWER6, POWER9|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4415

{"crorc", XL(19,417), XL_MASK, COM, PPCVLE, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

4417

{"nap", XL(19,434), 0xffffffff, POWER6, POWER9|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4419

{"crmove", XL(19,449), XL_MASK, PPCCOM, PPCVLE, {BT, BA, BBA}},

arch/powerpc/xmon/ppc-opc.c

4420

{"cror", XL(19,449), XL_MASK, COM, PPCVLE, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

4422

{"sleep", XL(19,466), 0xffffffff, POWER6, POWER9|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4423

{"rvwinkle", XL(19,498), 0xffffffff, POWER6, POWER9|PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4425

{"bctr", XLO(19,BOU,528,0), XLBOBIBB_MASK, COM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4426

{"bctrl", XLO(19,BOU,528,1), XLBOBIBB_MASK, COM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4428

{"bgectr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4429

{"bgectr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4430

{"bnlctr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4431

{"bnlctr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4432

{"bgectrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4433

{"bgectrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4434

{"bnlctrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4435

{"bnlctrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4436

{"blectr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4437

{"blectr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4438

{"bngctr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4439

{"bngctr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4440

{"blectrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4441

{"blectrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4442

{"bngctrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4443

{"bngctrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4444

{"bnectr", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4445

{"bnectr-", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4446

{"bnectrl", XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4447

{"bnectrl-",XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4448

{"bnsctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4449

{"bnsctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4450

{"bnuctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4451

{"bnuctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4452

{"bnsctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4453

{"bnsctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4454

{"bnuctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4455

{"bnuctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4456

{"bgectr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4457

{"bnlctr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4458

{"bgectrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4459

{"bnlctrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4460

{"blectr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4461

{"bngctr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4462

{"blectrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4463

{"bngctrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4464

{"bnectr+", XLOCB(19,BOFP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4465

{"bnectrl+",XLOCB(19,BOFP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4466

{"bnsctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4467

{"bnuctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4468

{"bnsctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4469

{"bnuctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4470

{"bgectr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4471

{"bnlctr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4472

{"bgectrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4473

{"bnlctrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4474

{"blectr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4475

{"bngctr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4476

{"blectrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4477

{"bngctrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4478

{"bnectr-", XLOCB(19,BOFM4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4479

{"bnectrl-",XLOCB(19,BOFM4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4480

{"bnsctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4481

{"bnuctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4482

{"bnsctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4483

{"bnuctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4484

{"bgectr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4485

{"bnlctr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4486

{"bgectrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4487

{"bnlctrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4488

{"blectr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4489

{"bngctr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4490

{"blectrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4491

{"bngctrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4492

{"bnectr+", XLOCB(19,BOFP4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4493

{"bnectrl+",XLOCB(19,BOFP4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4494

{"bnsctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4495

{"bnuctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4496

{"bnsctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4497

{"bnuctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4498

{"bltctr", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4499

{"bltctr-", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4500

{"bltctrl", XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4501

{"bltctrl-",XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4502

{"bgtctr", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4503

{"bgtctr-", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4504

{"bgtctrl", XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4505

{"bgtctrl-",XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4506

{"beqctr", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4507

{"beqctr-", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4508

{"beqctrl", XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4509

{"beqctrl-",XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4510

{"bsoctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4511

{"bsoctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4512

{"bunctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4513

{"bunctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4514

{"bsoctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4515

{"bsoctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4516

{"bunctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4517

{"bunctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4518

{"bltctr+", XLOCB(19,BOTP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4519

{"bltctrl+",XLOCB(19,BOTP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4520

{"bgtctr+", XLOCB(19,BOTP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4521

{"bgtctrl+",XLOCB(19,BOTP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4522

{"beqctr+", XLOCB(19,BOTP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4523

{"beqctrl+",XLOCB(19,BOTP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4524

{"bsoctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4525

{"bunctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4526

{"bsoctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4527

{"bunctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4528

{"bltctr-", XLOCB(19,BOTM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4529

{"bltctrl-",XLOCB(19,BOTM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4530

{"bgtctr-", XLOCB(19,BOTM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4531

{"bgtctrl-",XLOCB(19,BOTM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4532

{"beqctr-", XLOCB(19,BOTM4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4533

{"beqctrl-",XLOCB(19,BOTM4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4534

{"bsoctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4535

{"bunctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4536

{"bsoctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4537

{"bunctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4538

{"bltctr+", XLOCB(19,BOTP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4539

{"bltctrl+",XLOCB(19,BOTP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4540

{"bgtctr+", XLOCB(19,BOTP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4541

{"bgtctrl+",XLOCB(19,BOTP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4542

{"beqctr+", XLOCB(19,BOTP4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4543

{"beqctrl+",XLOCB(19,BOTP4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4544

{"bsoctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4545

{"bunctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4546

{"bsoctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4547

{"bunctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},

arch/powerpc/xmon/ppc-opc.c

4549

{"bfctr", XLO(19,BOF,528,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4550

{"bfctr-", XLO(19,BOF,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4551

{"bfctrl", XLO(19,BOF,528,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4552

{"bfctrl-", XLO(19,BOF,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4553

{"bfctr+", XLO(19,BOFP,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4554

{"bfctrl+", XLO(19,BOFP,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4555

{"bfctr-", XLO(19,BOFM4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4556

{"bfctrl-", XLO(19,BOFM4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4557

{"bfctr+", XLO(19,BOFP4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4558

{"bfctrl+", XLO(19,BOFP4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4559

{"btctr", XLO(19,BOT,528,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4560

{"btctr-", XLO(19,BOT,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4561

{"btctrl", XLO(19,BOT,528,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4562

{"btctrl-", XLO(19,BOT,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4563

{"btctr+", XLO(19,BOTP,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4564

{"btctrl+", XLO(19,BOTP,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4565

{"btctr-", XLO(19,BOTM4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4566

{"btctrl-", XLO(19,BOTM4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4567

{"btctr+", XLO(19,BOTP4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4568

{"btctrl+", XLO(19,BOTP4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},

arch/powerpc/xmon/ppc-opc.c

4570

{"bcctr-", XLYLK(19,528,0,0), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},

arch/powerpc/xmon/ppc-opc.c

4571

{"bcctrl-", XLYLK(19,528,0,1), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},

arch/powerpc/xmon/ppc-opc.c

4572

{"bcctr+", XLYLK(19,528,1,0), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},

arch/powerpc/xmon/ppc-opc.c

4573

{"bcctrl+", XLYLK(19,528,1,1), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},

arch/powerpc/xmon/ppc-opc.c

4574

{"bcctr", XLLK(19,528,0), XLBH_MASK, PPCCOM, PPCVLE, {BO, BI, BH}},

arch/powerpc/xmon/ppc-opc.c

4575

{"bcc", XLLK(19,528,0), XLBB_MASK, PWRCOM, PPCVLE, {BO, BI}},

arch/powerpc/xmon/ppc-opc.c

4576

{"bcctrl", XLLK(19,528,1), XLBH_MASK, PPCCOM, PPCVLE, {BO, BI, BH}},

arch/powerpc/xmon/ppc-opc.c

4577

{"bccl", XLLK(19,528,1), XLBB_MASK, PWRCOM, PPCVLE, {BO, BI}},

arch/powerpc/xmon/ppc-opc.c

4579

{"bctar-", XLYLK(19,560,0,0), XLYBB_MASK, POWER8, PPCVLE, {BOE, BI}},

arch/powerpc/xmon/ppc-opc.c

4580

{"bctarl-", XLYLK(19,560,0,1), XLYBB_MASK, POWER8, PPCVLE, {BOE, BI}},

arch/powerpc/xmon/ppc-opc.c

4581

{"bctar+", XLYLK(19,560,1,0), XLYBB_MASK, POWER8, PPCVLE, {BOE, BI}},

arch/powerpc/xmon/ppc-opc.c

4582

{"bctarl+", XLYLK(19,560,1,1), XLYBB_MASK, POWER8, PPCVLE, {BOE, BI}},

arch/powerpc/xmon/ppc-opc.c

4583

{"bctar", XLLK(19,560,0), XLBH_MASK, POWER8, PPCVLE, {BO, BI, BH}},

arch/powerpc/xmon/ppc-opc.c

4584

{"bctarl", XLLK(19,560,1), XLBH_MASK, POWER8, PPCVLE, {BO, BI, BH}},

arch/powerpc/xmon/ppc-opc.c

4586

{"rlwimi", M(20,0), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4587

{"rlimi", M(20,0), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4589

{"rlwimi.", M(20,1), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4590

{"rlimi.", M(20,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4592

{"rotlwi", MME(21,31,0), MMBME_MASK, PPCCOM, PPCVLE, {RA, RS, SH}},

arch/powerpc/xmon/ppc-opc.c

4593

{"clrlwi", MME(21,31,0), MSHME_MASK, PPCCOM, PPCVLE, {RA, RS, MB}},

arch/powerpc/xmon/ppc-opc.c

4594

{"rlwinm", M(21,0), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4595

{"rlinm", M(21,0), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4596

{"rotlwi.", MME(21,31,1), MMBME_MASK, PPCCOM, PPCVLE, {RA, RS, SH}},

arch/powerpc/xmon/ppc-opc.c

4597

{"clrlwi.", MME(21,31,1), MSHME_MASK, PPCCOM, PPCVLE, {RA, RS, MB}},

arch/powerpc/xmon/ppc-opc.c

4598

{"rlwinm.", M(21,1), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4599

{"rlinm.", M(21,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4601

{"rlmi", M(22,0), M_MASK, M601, PPCVLE, {RA, RS, RB, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4602

{"rlmi.", M(22,1), M_MASK, M601, PPCVLE, {RA, RS, RB, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4604

{"rotlw", MME(23,31,0), MMBME_MASK, PPCCOM, PPCVLE, {RA, RS, RB}},

arch/powerpc/xmon/ppc-opc.c

4605

{"rlwnm", M(23,0), M_MASK, PPCCOM, PPCVLE, {RA, RS, RB, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4606

{"rlnm", M(23,0), M_MASK, PWRCOM, PPCVLE, {RA, RS, RB, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4607

{"rotlw.", MME(23,31,1), MMBME_MASK, PPCCOM, PPCVLE, {RA, RS, RB}},

arch/powerpc/xmon/ppc-opc.c

4608

{"rlwnm.", M(23,1), M_MASK, PPCCOM, PPCVLE, {RA, RS, RB, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4609

{"rlnm.", M(23,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, RB, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

4611

{"nop", OP(24), 0xffffffff, PPCCOM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4612

{"ori", OP(24), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},

arch/powerpc/xmon/ppc-opc.c

4613

{"oril", OP(24), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},

arch/powerpc/xmon/ppc-opc.c

4615

{"oris", OP(25), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},

arch/powerpc/xmon/ppc-opc.c

4616

{"oriu", OP(25), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},

arch/powerpc/xmon/ppc-opc.c

4618

{"xnop", OP(26), 0xffffffff, PPCCOM, PPCVLE, {0}},

arch/powerpc/xmon/ppc-opc.c

4619

{"xori", OP(26), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},

arch/powerpc/xmon/ppc-opc.c

4620

{"xoril", OP(26), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},

arch/powerpc/xmon/ppc-opc.c

4622

{"xoris", OP(27), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},

arch/powerpc/xmon/ppc-opc.c

4623

{"xoriu", OP(27), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},

arch/powerpc/xmon/ppc-opc.c

4625

{"andi.", OP(28), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},

arch/powerpc/xmon/ppc-opc.c

4626

{"andil.", OP(28), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},

arch/powerpc/xmon/ppc-opc.c

4628

{"andis.", OP(29), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},

arch/powerpc/xmon/ppc-opc.c

4629

{"andiu.", OP(29), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},

arch/powerpc/xmon/ppc-opc.c

4631

{"rotldi", MD(30,0,0), MDMB_MASK, PPC64, PPCVLE, {RA, RS, SH6}},

arch/powerpc/xmon/ppc-opc.c

4632

{"clrldi", MD(30,0,0), MDSH_MASK, PPC64, PPCVLE, {RA, RS, MB6}},

arch/powerpc/xmon/ppc-opc.c

4633

{"rldicl", MD(30,0,0), MD_MASK, PPC64, PPCVLE, {RA, RS, SH6, MB6}},

arch/powerpc/xmon/ppc-opc.c

4634

{"rotldi.", MD(30,0,1), MDMB_MASK, PPC64, PPCVLE, {RA, RS, SH6}},

arch/powerpc/xmon/ppc-opc.c

4635

{"clrldi.", MD(30,0,1), MDSH_MASK, PPC64, PPCVLE, {RA, RS, MB6}},

arch/powerpc/xmon/ppc-opc.c

4636

{"rldicl.", MD(30,0,1), MD_MASK, PPC64, PPCVLE, {RA, RS, SH6, MB6}},

arch/powerpc/xmon/ppc-opc.c

4638

{"rldicr", MD(30,1,0), MD_MASK, PPC64, PPCVLE, {RA, RS, SH6, ME6}},

arch/powerpc/xmon/ppc-opc.c

4639

{"rldicr.", MD(30,1,1), MD_MASK, PPC64, PPCVLE, {RA, RS, SH6, ME6}},

arch/powerpc/xmon/ppc-opc.c

4641

{"rldic", MD(30,2,0), MD_MASK, PPC64, PPCVLE, {RA, RS, SH6, MB6}},

arch/powerpc/xmon/ppc-opc.c

4642

{"rldic.", MD(30,2,1), MD_MASK, PPC64, PPCVLE, {RA, RS, SH6, MB6}},

arch/powerpc/xmon/ppc-opc.c

4644

{"rldimi", MD(30,3,0), MD_MASK, PPC64, PPCVLE, {RA, RS, SH6, MB6}},

arch/powerpc/xmon/ppc-opc.c

4645

{"rldimi.", MD(30,3,1), MD_MASK, PPC64, PPCVLE, {RA, RS, SH6, MB6}},

arch/powerpc/xmon/ppc-opc.c

4647

{"rotld", MDS(30,8,0), MDSMB_MASK, PPC64, PPCVLE, {RA, RS, RB}},

arch/powerpc/xmon/ppc-opc.c

4648

{"rldcl", MDS(30,8,0), MDS_MASK, PPC64, PPCVLE, {RA, RS, RB, MB6}},

arch/powerpc/xmon/ppc-opc.c

4649

{"rotld.", MDS(30,8,1), MDSMB_MASK, PPC64, PPCVLE, {RA, RS, RB}},

arch/powerpc/xmon/ppc-opc.c

4650

{"rldcl.", MDS(30,8,1), MDS_MASK, PPC64, PPCVLE, {RA, RS, RB, MB6}},

arch/powerpc/xmon/ppc-opc.c

4652

{"rldcr", MDS(30,9,0), MDS_MASK, PPC64, PPCVLE, {RA, RS, RB, ME6}},

arch/powerpc/xmon/ppc-opc.c

4653

{"rldcr.", MDS(30,9,1), MDS_MASK, PPC64, PPCVLE, {RA, RS, RB, ME6}},

arch/powerpc/xmon/ppc-opc.c

6283

{"lwz", OP(32), OP_MASK, PPCCOM, PPCVLE, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6284

{"l", OP(32), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6286

{"lwzu", OP(33), OP_MASK, PPCCOM, PPCVLE, {RT, D, RAL}},

arch/powerpc/xmon/ppc-opc.c

6287

{"lu", OP(33), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6289

{"lbz", OP(34), OP_MASK, COM, PPCVLE, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6291

{"lbzu", OP(35), OP_MASK, COM, PPCVLE, {RT, D, RAL}},

arch/powerpc/xmon/ppc-opc.c

6293

{"stw", OP(36), OP_MASK, PPCCOM, PPCVLE, {RS, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6294

{"st", OP(36), OP_MASK, PWRCOM, PPCVLE, {RS, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6296

{"stwu", OP(37), OP_MASK, PPCCOM, PPCVLE, {RS, D, RAS}},

arch/powerpc/xmon/ppc-opc.c

6297

{"stu", OP(37), OP_MASK, PWRCOM, PPCVLE, {RS, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6299

{"stb", OP(38), OP_MASK, COM, PPCVLE, {RS, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6301

{"stbu", OP(39), OP_MASK, COM, PPCVLE, {RS, D, RAS}},

arch/powerpc/xmon/ppc-opc.c

6303

{"lhz", OP(40), OP_MASK, COM, PPCVLE, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6305

{"lhzu", OP(41), OP_MASK, COM, PPCVLE, {RT, D, RAL}},

arch/powerpc/xmon/ppc-opc.c

6307

{"lha", OP(42), OP_MASK, COM, PPCVLE, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6309

{"lhau", OP(43), OP_MASK, COM, PPCVLE, {RT, D, RAL}},

arch/powerpc/xmon/ppc-opc.c

6311

{"sth", OP(44), OP_MASK, COM, PPCVLE, {RS, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6313

{"sthu", OP(45), OP_MASK, COM, PPCVLE, {RS, D, RAS}},

arch/powerpc/xmon/ppc-opc.c

6315

{"lmw", OP(46), OP_MASK, PPCCOM, PPCVLE, {RT, D, RAM}},

arch/powerpc/xmon/ppc-opc.c

6316

{"lm", OP(46), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6318

{"stmw", OP(47), OP_MASK, PPCCOM, PPCVLE, {RS, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6319

{"stm", OP(47), OP_MASK, PWRCOM, PPCVLE, {RS, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6321

{"lfs", OP(48), OP_MASK, COM, PPCEFS|PPCVLE, {FRT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6323

{"lfsu", OP(49), OP_MASK, COM, PPCEFS|PPCVLE, {FRT, D, RAS}},

arch/powerpc/xmon/ppc-opc.c

6325

{"lfd", OP(50), OP_MASK, COM, PPCEFS|PPCVLE, {FRT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6327

{"lfdu", OP(51), OP_MASK, COM, PPCEFS|PPCVLE, {FRT, D, RAS}},

arch/powerpc/xmon/ppc-opc.c

6329

{"stfs", OP(52), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6331

{"stfsu", OP(53), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RAS}},

arch/powerpc/xmon/ppc-opc.c

6333

{"stfd", OP(54), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6335

{"stfdu", OP(55), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RAS}},

arch/powerpc/xmon/ppc-opc.c

6337

{"lq", OP(56), OP_MASK, POWER4, PPC476|PPCVLE, {RTQ, DQ, RAQ}},

arch/powerpc/xmon/ppc-opc.c

6338

{"psq_l", OP(56), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}},

arch/powerpc/xmon/ppc-opc.c

6339

{"lfq", OP(56), OP_MASK, POWER2, PPCVLE, {FRT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6341

{"lxsd", DSO(57,2), DS_MASK, PPCVSX3, PPCVLE, {VD, DS, RA0}},

arch/powerpc/xmon/ppc-opc.c

6342

{"lxssp", DSO(57,3), DS_MASK, PPCVSX3, PPCVLE, {VD, DS, RA0}},

arch/powerpc/xmon/ppc-opc.c

6343

{"lfdp", OP(57), OP_MASK, POWER6, POWER7|PPCVLE, {FRTp, DS, RA0}},

arch/powerpc/xmon/ppc-opc.c

6344

{"psq_lu", OP(57), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}},

arch/powerpc/xmon/ppc-opc.c

6345

{"lfqu", OP(57), OP_MASK, POWER2, PPCVLE, {FRT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

6347

{"ld", DSO(58,0), DS_MASK, PPC64, PPCVLE, {RT, DS, RA0}},

arch/powerpc/xmon/ppc-opc.c

6348

{"ldu", DSO(58,1), DS_MASK, PPC64, PPCVLE, {RT, DS, RAL}},

arch/powerpc/xmon/ppc-opc.c

6349

{"lwa", DSO(58,2), DS_MASK, PPC64, PPCVLE, {RT, DS, RA0}},

arch/powerpc/xmon/ppc-opc.c

6351

{"dadd", XRC(59,2,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6352

{"dadd.", XRC(59,2,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6354

{"dqua", ZRC(59,3,0), Z2_MASK, POWER6, PPCVLE, {FRT,FRA,FRB,RMC}},

arch/powerpc/xmon/ppc-opc.c

6355

{"dqua.", ZRC(59,3,1), Z2_MASK, POWER6, PPCVLE, {FRT,FRA,FRB,RMC}},

arch/powerpc/xmon/ppc-opc.c

6357

{"fdivs", A(59,18,0), AFRC_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6358

{"fdivs.", A(59,18,1), AFRC_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6360

{"fsubs", A(59,20,0), AFRC_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6361

{"fsubs.", A(59,20,1), AFRC_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6363

{"fadds", A(59,21,0), AFRC_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6364

{"fadds.", A(59,21,1), AFRC_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6366

{"fsqrts", A(59,22,0), AFRAFRC_MASK, PPC, TITAN|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6367

{"fsqrts.", A(59,22,1), AFRAFRC_MASK, PPC, TITAN|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6369

{"fres", A(59,24,0), AFRAFRC_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6370

{"fres", A(59,24,0), AFRALFRC_MASK, PPC, POWER7|PPCVLE, {FRT, FRB, A_L}},

arch/powerpc/xmon/ppc-opc.c

6371

{"fres.", A(59,24,1), AFRAFRC_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6372

{"fres.", A(59,24,1), AFRALFRC_MASK, PPC, POWER7|PPCVLE, {FRT, FRB, A_L}},

arch/powerpc/xmon/ppc-opc.c

6374

{"fmuls", A(59,25,0), AFRB_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRC}},

arch/powerpc/xmon/ppc-opc.c

6375

{"fmuls.", A(59,25,1), AFRB_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRC}},

arch/powerpc/xmon/ppc-opc.c

6377

{"frsqrtes", A(59,26,0), AFRAFRC_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6378

{"frsqrtes", A(59,26,0), AFRALFRC_MASK, POWER5, POWER7|PPCVLE, {FRT, FRB, A_L}},

arch/powerpc/xmon/ppc-opc.c

6379

{"frsqrtes.", A(59,26,1), AFRAFRC_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6380

{"frsqrtes.", A(59,26,1), AFRALFRC_MASK, POWER5, POWER7|PPCVLE, {FRT, FRB, A_L}},

arch/powerpc/xmon/ppc-opc.c

6382

{"fmsubs", A(59,28,0), A_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6383

{"fmsubs.", A(59,28,1), A_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6385

{"fmadds", A(59,29,0), A_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6386

{"fmadds.", A(59,29,1), A_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6388

{"fnmsubs", A(59,30,0), A_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6389

{"fnmsubs.", A(59,30,1), A_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6391

{"fnmadds", A(59,31,0), A_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6392

{"fnmadds.", A(59,31,1), A_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6394

{"dmul", XRC(59,34,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6395

{"dmul.", XRC(59,34,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6397

{"drrnd", ZRC(59,35,0), Z2_MASK, POWER6, PPCVLE, {FRT, FRA, FRB, RMC}},

arch/powerpc/xmon/ppc-opc.c

6398

{"drrnd.", ZRC(59,35,1), Z2_MASK, POWER6, PPCVLE, {FRT, FRA, FRB, RMC}},

arch/powerpc/xmon/ppc-opc.c

6400

{"dscli", ZRC(59,66,0), Z_MASK, POWER6, PPCVLE, {FRT, FRA, SH16}},

arch/powerpc/xmon/ppc-opc.c

6401

{"dscli.", ZRC(59,66,1), Z_MASK, POWER6, PPCVLE, {FRT, FRA, SH16}},

arch/powerpc/xmon/ppc-opc.c

6403

{"dquai", ZRC(59,67,0), Z2_MASK, POWER6, PPCVLE, {TE, FRT,FRB,RMC}},

arch/powerpc/xmon/ppc-opc.c

6404

{"dquai.", ZRC(59,67,1), Z2_MASK, POWER6, PPCVLE, {TE, FRT,FRB,RMC}},

arch/powerpc/xmon/ppc-opc.c

6406

{"dscri", ZRC(59,98,0), Z_MASK, POWER6, PPCVLE, {FRT, FRA, SH16}},

arch/powerpc/xmon/ppc-opc.c

6407

{"dscri.", ZRC(59,98,1), Z_MASK, POWER6, PPCVLE, {FRT, FRA, SH16}},

arch/powerpc/xmon/ppc-opc.c

6409

{"drintx", ZRC(59,99,0), Z2_MASK, POWER6, PPCVLE, {R, FRT, FRB, RMC}},

arch/powerpc/xmon/ppc-opc.c

6410

{"drintx.", ZRC(59,99,1), Z2_MASK, POWER6, PPCVLE, {R, FRT, FRB, RMC}},

arch/powerpc/xmon/ppc-opc.c

6412

{"dcmpo", X(59,130), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6414

{"dtstex", X(59,162), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6415

{"dtstdc", Z(59,194), Z_MASK, POWER6, PPCVLE, {BF, FRA, DCM}},

arch/powerpc/xmon/ppc-opc.c

6416

{"dtstdg", Z(59,226), Z_MASK, POWER6, PPCVLE, {BF, FRA, DGM}},

arch/powerpc/xmon/ppc-opc.c

6418

{"drintn", ZRC(59,227,0), Z2_MASK, POWER6, PPCVLE, {R, FRT, FRB, RMC}},

arch/powerpc/xmon/ppc-opc.c

6419

{"drintn.", ZRC(59,227,1), Z2_MASK, POWER6, PPCVLE, {R, FRT, FRB, RMC}},

arch/powerpc/xmon/ppc-opc.c

6421

{"dctdp", XRC(59,258,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6422

{"dctdp.", XRC(59,258,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6424

{"dctfix", XRC(59,290,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6425

{"dctfix.", XRC(59,290,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6427

{"ddedpd", XRC(59,322,0), X_MASK, POWER6, PPCVLE, {SP, FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6428

{"ddedpd.", XRC(59,322,1), X_MASK, POWER6, PPCVLE, {SP, FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6430

{"dxex", XRC(59,354,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6431

{"dxex.", XRC(59,354,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6433

{"dsub", XRC(59,514,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6434

{"dsub.", XRC(59,514,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6436

{"ddiv", XRC(59,546,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6437

{"ddiv.", XRC(59,546,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6439

{"dcmpu", X(59,642), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6441

{"dtstsf", X(59,674), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6442

{"dtstsfi", X(59,675), X_MASK|1<<22,POWER9, PPCVLE, {BF, UIM6, FRB}},

arch/powerpc/xmon/ppc-opc.c

6444

{"drsp", XRC(59,770,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6445

{"drsp.", XRC(59,770,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6447

{"dcffix", XRC(59,802,0), X_MASK|FRA_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6448

{"dcffix.", XRC(59,802,1), X_MASK|FRA_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6450

{"denbcd", XRC(59,834,0), X_MASK, POWER6, PPCVLE, {S, FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6451

{"denbcd.", XRC(59,834,1), X_MASK, POWER6, PPCVLE, {S, FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6453

{"fcfids", XRC(59,846,0), XRA_MASK, POWER7|PPCA2, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6454

{"fcfids.", XRC(59,846,1), XRA_MASK, POWER7|PPCA2, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6456

{"diex", XRC(59,866,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6457

{"diex.", XRC(59,866,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6459

{"fcfidus", XRC(59,974,0), XRA_MASK, POWER7|PPCA2, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6460

{"fcfidus.", XRC(59,974,1), XRA_MASK, POWER7|PPCA2, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6462

{"xsaddsp", XX3(60,0), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6463

{"xsmaddasp", XX3(60,1), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6464

{"xxsldwi", XX3(60,2), XX3SHW_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6, SHW}},

arch/powerpc/xmon/ppc-opc.c

6465

{"xscmpeqdp", XX3(60,3), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6466

{"xsrsqrtesp", XX2(60,10), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6467

{"xssqrtsp", XX2(60,11), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6468

{"xxsel", XX4(60,3), XX4_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6, XC6}},

arch/powerpc/xmon/ppc-opc.c

6469

{"xssubsp", XX3(60,8), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6470

{"xsmaddmsp", XX3(60,9), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6471

{"xxspltd", XX3(60,10), XX3DM_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6S, DMEX}},

arch/powerpc/xmon/ppc-opc.c

6472

{"xxmrghd", XX3(60,10), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6473

{"xxswapd", XX3(60,10)|(2<<8), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6S}},

arch/powerpc/xmon/ppc-opc.c

6474

{"xxmrgld", XX3(60,10)|(3<<8), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6475

{"xxpermdi", XX3(60,10), XX3DM_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6, DM}},

arch/powerpc/xmon/ppc-opc.c

6476

{"xscmpgtdp", XX3(60,11), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6477

{"xsresp", XX2(60,26), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6478

{"xsmulsp", XX3(60,16), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6479

{"xsmsubasp", XX3(60,17), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6480

{"xxmrghw", XX3(60,18), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6481

{"xscmpgedp", XX3(60,19), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6482

{"xsdivsp", XX3(60,24), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6483

{"xsmsubmsp", XX3(60,25), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6484

{"xxperm", XX3(60,26), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6485

{"xsadddp", XX3(60,32), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6486

{"xsmaddadp", XX3(60,33), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6487

{"xscmpudp", XX3(60,35), XX3BF_MASK, PPCVSX, PPCVLE, {BF, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6488

{"xscvdpuxws", XX2(60,72), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6489

{"xsrdpi", XX2(60,73), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6490

{"xsrsqrtedp", XX2(60,74), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6491

{"xssqrtdp", XX2(60,75), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6492

{"xssubdp", XX3(60,40), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6493

{"xsmaddmdp", XX3(60,41), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6494

{"xscmpodp", XX3(60,43), XX3BF_MASK, PPCVSX, PPCVLE, {BF, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6495

{"xscvdpsxws", XX2(60,88), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6496

{"xsrdpiz", XX2(60,89), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6497

{"xsredp", XX2(60,90), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6498

{"xsmuldp", XX3(60,48), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6499

{"xsmsubadp", XX3(60,49), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6500

{"xxmrglw", XX3(60,50), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6501

{"xsrdpip", XX2(60,105), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6502

{"xstsqrtdp", XX2(60,106), XX2BF_MASK, PPCVSX, PPCVLE, {BF, XB6}},

arch/powerpc/xmon/ppc-opc.c

6503

{"xsrdpic", XX2(60,107), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6504

{"xsdivdp", XX3(60,56), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6505

{"xsmsubmdp", XX3(60,57), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6506

{"xxpermr", XX3(60,58), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6507

{"xscmpexpdp", XX3(60,59), XX3BF_MASK, PPCVSX3, PPCVLE, {BF, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6508

{"xsrdpim", XX2(60,121), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6509

{"xstdivdp", XX3(60,61), XX3BF_MASK, PPCVSX, PPCVLE, {BF, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6510

{"xvaddsp", XX3(60,64), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6511

{"xvmaddasp", XX3(60,65), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6512

{"xvcmpeqsp", XX3RC(60,67,0), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6513

{"xvcmpeqsp.", XX3RC(60,67,1), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6514

{"xvcvspuxws", XX2(60,136), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6515

{"xvrspi", XX2(60,137), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6516

{"xvrsqrtesp", XX2(60,138), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6517

{"xvsqrtsp", XX2(60,139), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6518

{"xvsubsp", XX3(60,72), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6519

{"xvmaddmsp", XX3(60,73), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6520

{"xvcmpgtsp", XX3RC(60,75,0), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6521

{"xvcmpgtsp.", XX3RC(60,75,1), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6522

{"xvcvspsxws", XX2(60,152), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6523

{"xvrspiz", XX2(60,153), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6524

{"xvresp", XX2(60,154), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6525

{"xvmulsp", XX3(60,80), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6526

{"xvmsubasp", XX3(60,81), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6527

{"xxspltw", XX2(60,164), XX2UIM_MASK, PPCVSX, PPCVLE, {XT6, XB6, UIM}},

arch/powerpc/xmon/ppc-opc.c

6528

{"xxextractuw", XX2(60,165), XX2UIM4_MASK, PPCVSX3, PPCVLE, {XT6, XB6, UIMM4}},

arch/powerpc/xmon/ppc-opc.c

6529

{"xvcmpgesp", XX3RC(60,83,0), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6530

{"xvcmpgesp.", XX3RC(60,83,1), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6531

{"xvcvuxwsp", XX2(60,168), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6532

{"xvrspip", XX2(60,169), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6533

{"xvtsqrtsp", XX2(60,170), XX2BF_MASK, PPCVSX, PPCVLE, {BF, XB6}},

arch/powerpc/xmon/ppc-opc.c

6534

{"xvrspic", XX2(60,171), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6535

{"xvdivsp", XX3(60,88), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6536

{"xvmsubmsp", XX3(60,89), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6537

{"xxspltib", X(60,360), XX1_MASK|3<<19, PPCVSX3, PPCVLE, {XT6, IMM8}},

arch/powerpc/xmon/ppc-opc.c

6538

{"xxinsertw", XX2(60,181), XX2UIM4_MASK, PPCVSX3, PPCVLE, {XT6, XB6, UIMM4}},

arch/powerpc/xmon/ppc-opc.c

6539

{"xvcvsxwsp", XX2(60,184), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6540

{"xvrspim", XX2(60,185), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6541

{"xvtdivsp", XX3(60,93), XX3BF_MASK, PPCVSX, PPCVLE, {BF, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6542

{"xvadddp", XX3(60,96), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6543

{"xvmaddadp", XX3(60,97), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6544

{"xvcmpeqdp", XX3RC(60,99,0), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6545

{"xvcmpeqdp.", XX3RC(60,99,1), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6546

{"xvcvdpuxws", XX2(60,200), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6547

{"xvrdpi", XX2(60,201), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6548

{"xvrsqrtedp", XX2(60,202), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6549

{"xvsqrtdp", XX2(60,203), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6550

{"xvsubdp", XX3(60,104), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6551

{"xvmaddmdp", XX3(60,105), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6552

{"xvcmpgtdp", XX3RC(60,107,0), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6553

{"xvcmpgtdp.", XX3RC(60,107,1), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6554

{"xvcvdpsxws", XX2(60,216), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6555

{"xvrdpiz", XX2(60,217), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6556

{"xvredp", XX2(60,218), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6557

{"xvmuldp", XX3(60,112), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6558

{"xvmsubadp", XX3(60,113), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6559

{"xvcmpgedp", XX3RC(60,115,0), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6560

{"xvcmpgedp.", XX3RC(60,115,1), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6561

{"xvcvuxwdp", XX2(60,232), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6562

{"xvrdpip", XX2(60,233), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6563

{"xvtsqrtdp", XX2(60,234), XX2BF_MASK, PPCVSX, PPCVLE, {BF, XB6}},

arch/powerpc/xmon/ppc-opc.c

6564

{"xvrdpic", XX2(60,235), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6565

{"xvdivdp", XX3(60,120), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6566

{"xvmsubmdp", XX3(60,121), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6567

{"xvcvsxwdp", XX2(60,248), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6568

{"xvrdpim", XX2(60,249), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6569

{"xvtdivdp", XX3(60,125), XX3BF_MASK, PPCVSX, PPCVLE, {BF, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6570

{"xsmaxcdp", XX3(60,128), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6571

{"xsnmaddasp", XX3(60,129), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6572

{"xxland", XX3(60,130), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6573

{"xscvdpsp", XX2(60,265), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6574

{"xscvdpspn", XX2(60,267), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6575

{"xsmincdp", XX3(60,136), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6576

{"xsnmaddmsp", XX3(60,137), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6577

{"xxlandc", XX3(60,138), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6578

{"xsrsp", XX2(60,281), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6579

{"xsmaxjdp", XX3(60,144), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6580

{"xsnmsubasp", XX3(60,145), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6581

{"xxlor", XX3(60,146), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6582

{"xscvuxdsp", XX2(60,296), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6583

{"xststdcsp", XX2(60,298), XX2BFD_MASK, PPCVSX3, PPCVLE, {BF, XB6, DCMX}},

arch/powerpc/xmon/ppc-opc.c

6584

{"xsminjdp", XX3(60,152), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6585

{"xsnmsubmsp", XX3(60,153), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6586

{"xxlxor", XX3(60,154), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6587

{"xscvsxdsp", XX2(60,312), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6588

{"xsmaxdp", XX3(60,160), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6589

{"xsnmaddadp", XX3(60,161), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6590

{"xxlnor", XX3(60,162), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6591

{"xscvdpuxds", XX2(60,328), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6592

{"xscvspdp", XX2(60,329), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6593

{"xscvspdpn", XX2(60,331), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6594

{"xsmindp", XX3(60,168), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6595

{"xsnmaddmdp", XX3(60,169), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6596

{"xxlorc", XX3(60,170), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6597

{"xscvdpsxds", XX2(60,344), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6598

{"xsabsdp", XX2(60,345), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6599

{"xsxexpdp", XX2VA(60,347,0),XX2_MASK|1, PPCVSX3, PPCVLE, {RT, XB6}},

arch/powerpc/xmon/ppc-opc.c

6600

{"xsxsigdp", XX2VA(60,347,1),XX2_MASK|1, PPCVSX3, PPCVLE, {RT, XB6}},

arch/powerpc/xmon/ppc-opc.c

6601

{"xscvhpdp", XX2VA(60,347,16),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6602

{"xscvdphp", XX2VA(60,347,17),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6603

{"xscpsgndp", XX3(60,176), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6604

{"xsnmsubadp", XX3(60,177), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6605

{"xxlnand", XX3(60,178), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6606

{"xscvuxddp", XX2(60,360), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6607

{"xsnabsdp", XX2(60,361), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6608

{"xststdcdp", XX2(60,362), XX2BFD_MASK, PPCVSX3, PPCVLE, {BF, XB6, DCMX}},

arch/powerpc/xmon/ppc-opc.c

6609

{"xsnmsubmdp", XX3(60,185), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6610

{"xxleqv", XX3(60,186), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6611

{"xscvsxddp", XX2(60,376), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6612

{"xsnegdp", XX2(60,377), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6613

{"xvmaxsp", XX3(60,192), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6614

{"xvnmaddasp", XX3(60,193), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6615

{"xvcvspuxds", XX2(60,392), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6616

{"xvcvdpsp", XX2(60,393), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6617

{"xvminsp", XX3(60,200), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6618

{"xvnmaddmsp", XX3(60,201), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6619

{"xvcvspsxds", XX2(60,408), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6620

{"xvabssp", XX2(60,409), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6621

{"xvmovsp", XX3(60,208), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6S}},

arch/powerpc/xmon/ppc-opc.c

6622

{"xvcpsgnsp", XX3(60,208), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6623

{"xvnmsubasp", XX3(60,209), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6624

{"xvcvuxdsp", XX2(60,424), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6625

{"xvnabssp", XX2(60,425), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6626

{"xvtstdcsp", XX2(60,426), XX2DCMXS_MASK, PPCVSX3, PPCVLE, {XT6, XB6, DCMXS}},

arch/powerpc/xmon/ppc-opc.c

6627

{"xviexpsp", XX3(60,216), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6628

{"xvnmsubmsp", XX3(60,217), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6629

{"xvcvsxdsp", XX2(60,440), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6630

{"xvnegsp", XX2(60,441), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6631

{"xvmaxdp", XX3(60,224), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6632

{"xvnmaddadp", XX3(60,225), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6633

{"xvcvdpuxds", XX2(60,456), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6634

{"xvcvspdp", XX2(60,457), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6635

{"xsiexpdp", X(60,918), XX1_MASK, PPCVSX3, PPCVLE, {XT6, RA, RB}},

arch/powerpc/xmon/ppc-opc.c

6636

{"xvmindp", XX3(60,232), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6637

{"xvnmaddmdp", XX3(60,233), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6638

{"xvcvdpsxds", XX2(60,472), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6639

{"xvabsdp", XX2(60,473), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6640

{"xvxexpdp", XX2VA(60,475,0),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6641

{"xvxsigdp", XX2VA(60,475,1),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6642

{"xxbrh", XX2VA(60,475,7),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6643

{"xvxexpsp", XX2VA(60,475,8),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6644

{"xvxsigsp", XX2VA(60,475,9),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6645

{"xxbrw", XX2VA(60,475,15),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6646

{"xxbrd", XX2VA(60,475,23),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6647

{"xvcvhpsp", XX2VA(60,475,24),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6648

{"xvcvsphp", XX2VA(60,475,25),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6649

{"xxbrq", XX2VA(60,475,31),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6650

{"xvmovdp", XX3(60,240), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6S}},

arch/powerpc/xmon/ppc-opc.c

6651

{"xvcpsgndp", XX3(60,240), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6652

{"xvnmsubadp", XX3(60,241), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6653

{"xvcvuxddp", XX2(60,488), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6654

{"xvnabsdp", XX2(60,489), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6655

{"xvtstdcdp", XX2(60,490), XX2DCMXS_MASK, PPCVSX3, PPCVLE, {XT6, XB6, DCMXS}},

arch/powerpc/xmon/ppc-opc.c

6656

{"xviexpdp", XX3(60,248), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6657

{"xvnmsubmdp", XX3(60,249), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6658

{"xvcvsxddp", XX2(60,504), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6659

{"xvnegdp", XX2(60,505), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},

arch/powerpc/xmon/ppc-opc.c

6661

{"psq_st", OP(60), OP_MASK, PPCPS, PPCVLE, {FRS,PSD,RA,PSW,PSQ}},

arch/powerpc/xmon/ppc-opc.c

6662

{"stfq", OP(60), OP_MASK, POWER2, PPCVLE, {FRS, D, RA}},

arch/powerpc/xmon/ppc-opc.c

6664

{"lxv", DQX(61,1), DQX_MASK, PPCVSX3, PPCVLE, {XTQ6, DQ, RA0}},

arch/powerpc/xmon/ppc-opc.c

6665

{"stxv", DQX(61,5), DQX_MASK, PPCVSX3, PPCVLE, {XSQ6, DQ, RA0}},

arch/powerpc/xmon/ppc-opc.c

6666

{"stxsd", DSO(61,2), DS_MASK, PPCVSX3, PPCVLE, {VS, DS, RA0}},

arch/powerpc/xmon/ppc-opc.c

6667

{"stxssp", DSO(61,3), DS_MASK, PPCVSX3, PPCVLE, {VS, DS, RA0}},

arch/powerpc/xmon/ppc-opc.c

6668

{"stfdp", OP(61), OP_MASK, POWER6, POWER7|PPCVLE, {FRSp, DS, RA0}},

arch/powerpc/xmon/ppc-opc.c

6669

{"psq_stu", OP(61), OP_MASK, PPCPS, PPCVLE, {FRS,PSD,RA,PSW,PSQ}},

arch/powerpc/xmon/ppc-opc.c

6670

{"stfqu", OP(61), OP_MASK, POWER2, PPCVLE, {FRS, D, RA}},

arch/powerpc/xmon/ppc-opc.c

6672

{"std", DSO(62,0), DS_MASK, PPC64, PPCVLE, {RS, DS, RA0}},

arch/powerpc/xmon/ppc-opc.c

6673

{"stdu", DSO(62,1), DS_MASK, PPC64, PPCVLE, {RS, DS, RAS}},

arch/powerpc/xmon/ppc-opc.c

6674

{"stq", DSO(62,2), DS_MASK, POWER4, PPC476|PPCVLE, {RSQ, DS, RA0}},

arch/powerpc/xmon/ppc-opc.c

6676

{"fcmpu", X(63,0), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6678

{"daddq", XRC(63,2,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6679

{"daddq.", XRC(63,2,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6681

{"dquaq", ZRC(63,3,0), Z2_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}},

arch/powerpc/xmon/ppc-opc.c

6682

{"dquaq.", ZRC(63,3,1), Z2_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}},

arch/powerpc/xmon/ppc-opc.c

6684

{"xsaddqp", XRC(63,4,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6685

{"xsaddqpo", XRC(63,4,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6687

{"xsrqpi", ZRC(63,5,0), Z2_MASK, PPCVSX3, PPCVLE, {R, VD, VB, RMC}},

arch/powerpc/xmon/ppc-opc.c

6688

{"xsrqpix", ZRC(63,5,1), Z2_MASK, PPCVSX3, PPCVLE, {R, VD, VB, RMC}},

arch/powerpc/xmon/ppc-opc.c

6690

{"fcpsgn", XRC(63,8,0), X_MASK, POWER6|PPCA2|PPC476, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6691

{"fcpsgn.", XRC(63,8,1), X_MASK, POWER6|PPCA2|PPC476, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6693

{"frsp", XRC(63,12,0), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6694

{"frsp.", XRC(63,12,1), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6696

{"fctiw", XRC(63,14,0), XRA_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6697

{"fcir", XRC(63,14,0), XRA_MASK, PWR2COM, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6698

{"fctiw.", XRC(63,14,1), XRA_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6699

{"fcir.", XRC(63,14,1), XRA_MASK, PWR2COM, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6701

{"fctiwz", XRC(63,15,0), XRA_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6702

{"fcirz", XRC(63,15,0), XRA_MASK, PWR2COM, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6703

{"fctiwz.", XRC(63,15,1), XRA_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6704

{"fcirz.", XRC(63,15,1), XRA_MASK, PWR2COM, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6706

{"fdiv", A(63,18,0), AFRC_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6707

{"fd", A(63,18,0), AFRC_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6708

{"fdiv.", A(63,18,1), AFRC_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6709

{"fd.", A(63,18,1), AFRC_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6711

{"fsub", A(63,20,0), AFRC_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6712

{"fs", A(63,20,0), AFRC_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6713

{"fsub.", A(63,20,1), AFRC_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6714

{"fs.", A(63,20,1), AFRC_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6716

{"fadd", A(63,21,0), AFRC_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6717

{"fa", A(63,21,0), AFRC_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6718

{"fadd.", A(63,21,1), AFRC_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6719

{"fa.", A(63,21,1), AFRC_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6721

{"fsqrt", A(63,22,0), AFRAFRC_MASK, PPCPWR2, TITAN|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6722

{"fsqrt.", A(63,22,1), AFRAFRC_MASK, PPCPWR2, TITAN|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6724

{"fsel", A(63,23,0), A_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6725

{"fsel.", A(63,23,1), A_MASK, PPC, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6727

{"fre", A(63,24,0), AFRAFRC_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6728

{"fre", A(63,24,0), AFRALFRC_MASK, POWER5, POWER7|PPCVLE, {FRT, FRB, A_L}},

arch/powerpc/xmon/ppc-opc.c

6729

{"fre.", A(63,24,1), AFRAFRC_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6730

{"fre.", A(63,24,1), AFRALFRC_MASK, POWER5, POWER7|PPCVLE, {FRT, FRB, A_L}},

arch/powerpc/xmon/ppc-opc.c

6732

{"fmul", A(63,25,0), AFRB_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRC}},

arch/powerpc/xmon/ppc-opc.c

6733

{"fm", A(63,25,0), AFRB_MASK, PWRCOM, PPCVLE|PPCVLE, {FRT, FRA, FRC}},

arch/powerpc/xmon/ppc-opc.c

6734

{"fmul.", A(63,25,1), AFRB_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRC}},

arch/powerpc/xmon/ppc-opc.c

6735

{"fm.", A(63,25,1), AFRB_MASK, PWRCOM, PPCVLE|PPCVLE, {FRT, FRA, FRC}},

arch/powerpc/xmon/ppc-opc.c

6737

{"frsqrte", A(63,26,0), AFRAFRC_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6738

{"frsqrte", A(63,26,0), AFRALFRC_MASK, PPC, POWER7|PPCVLE, {FRT, FRB, A_L}},

arch/powerpc/xmon/ppc-opc.c

6739

{"frsqrte.", A(63,26,1), AFRAFRC_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6740

{"frsqrte.", A(63,26,1), AFRALFRC_MASK, PPC, POWER7|PPCVLE, {FRT, FRB, A_L}},

arch/powerpc/xmon/ppc-opc.c

6742

{"fmsub", A(63,28,0), A_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6743

{"fms", A(63,28,0), A_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6744

{"fmsub.", A(63,28,1), A_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6745

{"fms.", A(63,28,1), A_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6747

{"fmadd", A(63,29,0), A_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6748

{"fma", A(63,29,0), A_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6749

{"fmadd.", A(63,29,1), A_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6750

{"fma.", A(63,29,1), A_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6752

{"fnmsub", A(63,30,0), A_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6753

{"fnms", A(63,30,0), A_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6754

{"fnmsub.", A(63,30,1), A_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6755

{"fnms.", A(63,30,1), A_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6757

{"fnmadd", A(63,31,0), A_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6758

{"fnma", A(63,31,0), A_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6759

{"fnmadd.", A(63,31,1), A_MASK, PPCCOM, PPCEFS|PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6760

{"fnma.", A(63,31,1), A_MASK, PWRCOM, PPCVLE, {FRT, FRA, FRC, FRB}},

arch/powerpc/xmon/ppc-opc.c

6762

{"fcmpo", X(63,32), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6764

{"dmulq", XRC(63,34,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6765

{"dmulq.", XRC(63,34,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6767

{"drrndq", ZRC(63,35,0), Z2_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}},

arch/powerpc/xmon/ppc-opc.c

6768

{"drrndq.", ZRC(63,35,1), Z2_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}},

arch/powerpc/xmon/ppc-opc.c

6770

{"xsmulqp", XRC(63,36,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6771

{"xsmulqpo", XRC(63,36,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6773

{"xsrqpxp", Z(63,37), Z2_MASK, PPCVSX3, PPCVLE, {R, VD, VB, RMC}},

arch/powerpc/xmon/ppc-opc.c

6775

{"mtfsb1", XRC(63,38,0), XRARB_MASK, COM, PPCVLE, {BT}},

arch/powerpc/xmon/ppc-opc.c

6776

{"mtfsb1.", XRC(63,38,1), XRARB_MASK, COM, PPCVLE, {BT}},

arch/powerpc/xmon/ppc-opc.c

6778

{"fneg", XRC(63,40,0), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6779

{"fneg.", XRC(63,40,1), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6781

{"mcrfs", X(63,64), XRB_MASK|(3<<21)|(3<<16), COM, PPCVLE, {BF, BFA}},

arch/powerpc/xmon/ppc-opc.c

6783

{"dscliq", ZRC(63,66,0), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}},

arch/powerpc/xmon/ppc-opc.c

6784

{"dscliq.", ZRC(63,66,1), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}},

arch/powerpc/xmon/ppc-opc.c

6786

{"dquaiq", ZRC(63,67,0), Z2_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}},

arch/powerpc/xmon/ppc-opc.c

6787

{"dquaiq.", ZRC(63,67,1), Z2_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}},

arch/powerpc/xmon/ppc-opc.c

6789

{"mtfsb0", XRC(63,70,0), XRARB_MASK, COM, PPCVLE, {BT}},

arch/powerpc/xmon/ppc-opc.c

6790

{"mtfsb0.", XRC(63,70,1), XRARB_MASK, COM, PPCVLE, {BT}},

arch/powerpc/xmon/ppc-opc.c

6792

{"fmr", XRC(63,72,0), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6793

{"fmr.", XRC(63,72,1), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6795

{"dscriq", ZRC(63,98,0), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}},

arch/powerpc/xmon/ppc-opc.c

6796

{"dscriq.", ZRC(63,98,1), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}},

arch/powerpc/xmon/ppc-opc.c

6798

{"drintxq", ZRC(63,99,0), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}},

arch/powerpc/xmon/ppc-opc.c

6799

{"drintxq.", ZRC(63,99,1), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}},

arch/powerpc/xmon/ppc-opc.c

6801

{"xscpsgnqp", X(63,100), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6803

{"ftdiv", X(63,128), XBF_MASK, POWER7, PPCVLE, {BF, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6805

{"dcmpoq", X(63,130), X_MASK, POWER6, PPCVLE, {BF, FRAp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6807

{"xscmpoqp", X(63,132), XBF_MASK, PPCVSX3, PPCVLE, {BF, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6809

{"mtfsfi", XRC(63,134,0), XWRA_MASK|(3<<21)|(1<<11), POWER6|PPCA2|PPC476, PPCVLE, {BFF, U, W}},

arch/powerpc/xmon/ppc-opc.c

6810

{"mtfsfi", XRC(63,134,0), XRA_MASK|(3<<21)|(1<<11), COM, POWER6|PPCA2|PPC476|PPCVLE, {BFF, U}},

arch/powerpc/xmon/ppc-opc.c

6811

{"mtfsfi.", XRC(63,134,1), XWRA_MASK|(3<<21)|(1<<11), POWER6|PPCA2|PPC476, PPCVLE, {BFF, U, W}},

arch/powerpc/xmon/ppc-opc.c

6812

{"mtfsfi.", XRC(63,134,1), XRA_MASK|(3<<21)|(1<<11), COM, POWER6|PPCA2|PPC476|PPCVLE, {BFF, U}},

arch/powerpc/xmon/ppc-opc.c

6814

{"fnabs", XRC(63,136,0), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6815

{"fnabs.", XRC(63,136,1), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6817

{"fctiwu", XRC(63,142,0), XRA_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6818

{"fctiwu.", XRC(63,142,1), XRA_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6819

{"fctiwuz", XRC(63,143,0), XRA_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6820

{"fctiwuz.", XRC(63,143,1), XRA_MASK, POWER7, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6822

{"ftsqrt", X(63,160), XBF_MASK|FRA_MASK, POWER7, PPCVLE, {BF, FRB}},

arch/powerpc/xmon/ppc-opc.c

6824

{"dtstexq", X(63,162), X_MASK, POWER6, PPCVLE, {BF, FRAp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6826

{"xscmpexpqp", X(63,164), XBF_MASK, PPCVSX3, PPCVLE, {BF, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6828

{"dtstdcq", Z(63,194), Z_MASK, POWER6, PPCVLE, {BF, FRAp, DCM}},

arch/powerpc/xmon/ppc-opc.c

6829

{"dtstdgq", Z(63,226), Z_MASK, POWER6, PPCVLE, {BF, FRAp, DGM}},

arch/powerpc/xmon/ppc-opc.c

6831

{"drintnq", ZRC(63,227,0), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}},

arch/powerpc/xmon/ppc-opc.c

6832

{"drintnq.", ZRC(63,227,1), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}},

arch/powerpc/xmon/ppc-opc.c

6834

{"dctqpq", XRC(63,258,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}},

arch/powerpc/xmon/ppc-opc.c

6835

{"dctqpq.", XRC(63,258,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}},

arch/powerpc/xmon/ppc-opc.c

6837

{"fabs", XRC(63,264,0), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6838

{"fabs.", XRC(63,264,1), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6840

{"dctfixq", XRC(63,290,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6841

{"dctfixq.", XRC(63,290,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6843

{"ddedpdq", XRC(63,322,0), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6844

{"ddedpdq.", XRC(63,322,1), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6846

{"dxexq", XRC(63,354,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6847

{"dxexq.", XRC(63,354,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6849

{"xsmaddqp", XRC(63,388,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6850

{"xsmaddqpo", XRC(63,388,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6852

{"frin", XRC(63,392,0), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6853

{"frin.", XRC(63,392,1), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6855

{"xsmsubqp", XRC(63,420,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6856

{"xsmsubqpo", XRC(63,420,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6858

{"friz", XRC(63,424,0), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6859

{"friz.", XRC(63,424,1), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6861

{"xsnmaddqp", XRC(63,452,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6862

{"xsnmaddqpo", XRC(63,452,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6864

{"frip", XRC(63,456,0), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6865

{"frip.", XRC(63,456,1), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6867

{"xsnmsubqp", XRC(63,484,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6868

{"xsnmsubqpo", XRC(63,484,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6870

{"frim", XRC(63,488,0), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6871

{"frim.", XRC(63,488,1), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6873

{"dsubq", XRC(63,514,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6874

{"dsubq.", XRC(63,514,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6876

{"xssubqp", XRC(63,516,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6877

{"xssubqpo", XRC(63,516,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6879

{"ddivq", XRC(63,546,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6880

{"ddivq.", XRC(63,546,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6882

{"xsdivqp", XRC(63,548,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6883

{"xsdivqpo", XRC(63,548,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6885

{"mffs", XRC(63,583,0), XRARB_MASK, COM, PPCEFS|PPCVLE, {FRT}},

arch/powerpc/xmon/ppc-opc.c

6886

{"mffs.", XRC(63,583,1), XRARB_MASK, COM, PPCEFS|PPCVLE, {FRT}},

arch/powerpc/xmon/ppc-opc.c

6888

{"mffsce", XMMF(63,583,0,1), XMMF_MASK|RB_MASK, POWER9, PPCVLE, {FRT}},

arch/powerpc/xmon/ppc-opc.c

6889

{"mffscdrn", XMMF(63,583,2,4), XMMF_MASK, POWER9, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6890

{"mffscdrni", XMMF(63,583,2,5), XMMF_MASK|(3<<14), POWER9, PPCVLE, {FRT, DRM}},

arch/powerpc/xmon/ppc-opc.c

6891

{"mffscrn", XMMF(63,583,2,6), XMMF_MASK, POWER9, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6892

{"mffscrni", XMMF(63,583,2,7), XMMF_MASK|(7<<13), POWER9, PPCVLE, {FRT, RM}},

arch/powerpc/xmon/ppc-opc.c

6893

{"mffsl", XMMF(63,583,3,0), XMMF_MASK|RB_MASK, POWER9, PPCVLE, {FRT}},

arch/powerpc/xmon/ppc-opc.c

6895

{"dcmpuq", X(63,642), X_MASK, POWER6, PPCVLE, {BF, FRAp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6897

{"xscmpuqp", X(63,644), XBF_MASK, PPCVSX3, PPCVLE, {BF, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6899

{"dtstsfq", X(63,674), X_MASK, POWER6, PPCVLE, {BF, FRA, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6900

{"dtstsfiq", X(63,675), X_MASK|1<<22,POWER9, PPCVLE, {BF, UIM6, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6902

{"xststdcqp", X(63,708), X_MASK, PPCVSX3, PPCVLE, {BF, VB, DCMX}},

arch/powerpc/xmon/ppc-opc.c

6904

{"mtfsf", XFL(63,711,0), XFL_MASK, POWER6|PPCA2|PPC476, PPCVLE, {FLM, FRB, XFL_L, W}},

arch/powerpc/xmon/ppc-opc.c

6905

{"mtfsf", XFL(63,711,0), XFL_MASK, COM, POWER6|PPCA2|PPC476|PPCEFS|PPCVLE, {FLM, FRB}},

arch/powerpc/xmon/ppc-opc.c

6906

{"mtfsf.", XFL(63,711,1), XFL_MASK, POWER6|PPCA2|PPC476, PPCVLE, {FLM, FRB, XFL_L, W}},

arch/powerpc/xmon/ppc-opc.c

6907

{"mtfsf.", XFL(63,711,1), XFL_MASK, COM, POWER6|PPCA2|PPC476|PPCEFS|PPCVLE, {FLM, FRB}},

arch/powerpc/xmon/ppc-opc.c

6909

{"drdpq", XRC(63,770,0), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6910

{"drdpq.", XRC(63,770,1), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6912

{"dcffixq", XRC(63,802,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}},

arch/powerpc/xmon/ppc-opc.c

6913

{"dcffixq.", XRC(63,802,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}},

arch/powerpc/xmon/ppc-opc.c

6915

{"xsabsqp", XVA(63,804,0), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6916

{"xsxexpqp", XVA(63,804,2), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6917

{"xsnabsqp", XVA(63,804,8), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6918

{"xsnegqp", XVA(63,804,16), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6919

{"xsxsigqp", XVA(63,804,18), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6920

{"xssqrtqp", XVARC(63,804,27,0), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6921

{"xssqrtqpo", XVARC(63,804,27,1), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6923

{"fctid", XRC(63,814,0), XRA_MASK, PPC64, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6924

{"fctid", XRC(63,814,0), XRA_MASK, PPC476, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6925

{"fctid.", XRC(63,814,1), XRA_MASK, PPC64, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6926

{"fctid.", XRC(63,814,1), XRA_MASK, PPC476, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6928

{"fctidz", XRC(63,815,0), XRA_MASK, PPC64, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6929

{"fctidz", XRC(63,815,0), XRA_MASK, PPC476, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6930

{"fctidz.", XRC(63,815,1), XRA_MASK, PPC64, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6931

{"fctidz.", XRC(63,815,1), XRA_MASK, PPC476, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6933

{"denbcdq", XRC(63,834,0), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6934

{"denbcdq.", XRC(63,834,1), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6936

{"xscvqpuwz", XVA(63,836,1), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6937

{"xscvudqp", XVA(63,836,2), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6938

{"xscvqpswz", XVA(63,836,9), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6939

{"xscvsdqp", XVA(63,836,10), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6940

{"xscvqpudz", XVA(63,836,17), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6941

{"xscvqpdp", XVARC(63,836,20,0), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6942

{"xscvqpdpo", XVARC(63,836,20,1), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6943

{"xscvdpqp", XVA(63,836,22), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6944

{"xscvqpsdz", XVA(63,836,25), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6946

{"fmrgow", X(63,838), X_MASK, PPCVSX2, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6948

{"fcfid", XRC(63,846,0), XRA_MASK, PPC64, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6949

{"fcfid", XRC(63,846,0), XRA_MASK, PPC476, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6950

{"fcfid.", XRC(63,846,1), XRA_MASK, PPC64, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6951

{"fcfid.", XRC(63,846,1), XRA_MASK, PPC476, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6953

{"diexq", XRC(63,866,0), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6954

{"diexq.", XRC(63,866,1), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}},

arch/powerpc/xmon/ppc-opc.c

6956

{"xsiexpqp", X(63,868), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6958

{"fctidu", XRC(63,942,0), XRA_MASK, POWER7|PPCA2, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6959

{"fctidu.", XRC(63,942,1), XRA_MASK, POWER7|PPCA2, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6961

{"fctiduz", XRC(63,943,0), XRA_MASK, POWER7|PPCA2, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6962

{"fctiduz.", XRC(63,943,1), XRA_MASK, POWER7|PPCA2, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6964

{"fmrgew", X(63,966), X_MASK, PPCVSX2, PPCVLE, {FRT, FRA, FRB}},

arch/powerpc/xmon/ppc-opc.c

6966

{"fcfidu", XRC(63,974,0), XRA_MASK, POWER7|PPCA2, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6967

{"fcfidu.", XRC(63,974,1), XRA_MASK, POWER7|PPCA2, PPCVLE, {FRT, FRB}},

arch/powerpc/xmon/ppc-opc.c

6977

{"se_illegal", C(0), C_MASK, PPCVLE, 0, {}},

arch/powerpc/xmon/ppc-opc.c

6978

{"se_isync", C(1), C_MASK, PPCVLE, 0, {}},

arch/powerpc/xmon/ppc-opc.c

6979

{"se_sc", C(2), C_MASK, PPCVLE, 0, {}},

arch/powerpc/xmon/ppc-opc.c

6980

{"se_blr", C_LK(2,0), C_LK_MASK, PPCVLE, 0, {}},

arch/powerpc/xmon/ppc-opc.c

6981

{"se_blrl", C_LK(2,1), C_LK_MASK, PPCVLE, 0, {}},

arch/powerpc/xmon/ppc-opc.c

6982

{"se_bctr", C_LK(3,0), C_LK_MASK, PPCVLE, 0, {}},

arch/powerpc/xmon/ppc-opc.c

6983

{"se_bctrl", C_LK(3,1), C_LK_MASK, PPCVLE, 0, {}},

arch/powerpc/xmon/ppc-opc.c

6984

{"se_rfi", C(8), C_MASK, PPCVLE, 0, {}},

arch/powerpc/xmon/ppc-opc.c

6985

{"se_rfci", C(9), C_MASK, PPCVLE, 0, {}},

arch/powerpc/xmon/ppc-opc.c

6986

{"se_rfdi", C(10), C_MASK, PPCVLE, 0, {}},

arch/powerpc/xmon/ppc-opc.c

6987

{"se_rfmci", C(11), C_MASK, PPCRFMCI|PPCVLE, 0, {}},

arch/powerpc/xmon/ppc-opc.c

6988

{"se_not", SE_R(0,2), SE_R_MASK, PPCVLE, 0, {RX}},

arch/powerpc/xmon/ppc-opc.c

6989

{"se_neg", SE_R(0,3), SE_R_MASK, PPCVLE, 0, {RX}},

arch/powerpc/xmon/ppc-opc.c

6990

{"se_mflr", SE_R(0,8), SE_R_MASK, PPCVLE, 0, {RX}},

arch/powerpc/xmon/ppc-opc.c

6991

{"se_mtlr", SE_R(0,9), SE_R_MASK, PPCVLE, 0, {RX}},

arch/powerpc/xmon/ppc-opc.c

6992

{"se_mfctr", SE_R(0,10), SE_R_MASK, PPCVLE, 0, {RX}},

arch/powerpc/xmon/ppc-opc.c

6993

{"se_mtctr", SE_R(0,11), SE_R_MASK, PPCVLE, 0, {RX}},

arch/powerpc/xmon/ppc-opc.c

6994

{"se_extzb", SE_R(0,12), SE_R_MASK, PPCVLE, 0, {RX}},

arch/powerpc/xmon/ppc-opc.c

6995

{"se_extsb", SE_R(0,13), SE_R_MASK, PPCVLE, 0, {RX}},

arch/powerpc/xmon/ppc-opc.c

6996

{"se_extzh", SE_R(0,14), SE_R_MASK, PPCVLE, 0, {RX}},

arch/powerpc/xmon/ppc-opc.c

6997

{"se_extsh", SE_R(0,15), SE_R_MASK, PPCVLE, 0, {RX}},

arch/powerpc/xmon/ppc-opc.c

6998

{"se_mr", SE_RR(0,1), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

6999

{"se_mtar", SE_RR(0,2), SE_RR_MASK, PPCVLE, 0, {ARX, RY}},

arch/powerpc/xmon/ppc-opc.c

7000

{"se_mfar", SE_RR(0,3), SE_RR_MASK, PPCVLE, 0, {RX, ARY}},

arch/powerpc/xmon/ppc-opc.c

7001

{"se_add", SE_RR(1,0), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7002

{"se_mullw", SE_RR(1,1), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7003

{"se_sub", SE_RR(1,2), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7004

{"se_subf", SE_RR(1,3), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7005

{"se_cmp", SE_RR(3,0), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7006

{"se_cmpl", SE_RR(3,1), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7007

{"se_cmph", SE_RR(3,2), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7008

{"se_cmphl", SE_RR(3,3), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7010

{"e_cmpi", SCI8BF(6,0,21), SCI8BF_MASK, PPCVLE, 0, {CRD32, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7011

{"e_cmpwi", SCI8BF(6,0,21), SCI8BF_MASK, PPCVLE, 0, {CRD32, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7012

{"e_cmpli", SCI8BF(6,1,21), SCI8BF_MASK, PPCVLE, 0, {CRD32, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7013

{"e_cmplwi", SCI8BF(6,1,21), SCI8BF_MASK, PPCVLE, 0, {CRD32, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7014

{"e_addi", SCI8(6,16), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7015

{"e_subi", SCI8(6,16), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8N}},

arch/powerpc/xmon/ppc-opc.c

7016

{"e_addi.", SCI8(6,17), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7017

{"e_addic", SCI8(6,18), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7018

{"e_subic", SCI8(6,18), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8N}},

arch/powerpc/xmon/ppc-opc.c

7019

{"e_addic.", SCI8(6,19), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7020

{"e_subic.", SCI8(6,19), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8N}},

arch/powerpc/xmon/ppc-opc.c

7021

{"e_mulli", SCI8(6,20), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7022

{"e_subfic", SCI8(6,22), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7023

{"e_subfic.", SCI8(6,23), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7024

{"e_andi", SCI8(6,24), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7025

{"e_andi.", SCI8(6,25), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7026

{"e_nop", SCI8(6,26), 0xffffffff, PPCVLE, 0, {0}},

arch/powerpc/xmon/ppc-opc.c

7027

{"e_ori", SCI8(6,26), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7028

{"e_ori.", SCI8(6,27), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7029

{"e_xori", SCI8(6,28), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7030

{"e_xori.", SCI8(6,29), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},

arch/powerpc/xmon/ppc-opc.c

7031

{"e_lbzu", OPVUP(6,0), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7032

{"e_lhau", OPVUP(6,3), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7033

{"e_lhzu", OPVUP(6,1), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7034

{"e_lmw", OPVUP(6,8), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7035

{"e_lwzu", OPVUP(6,2), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7036

{"e_stbu", OPVUP(6,4), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7037

{"e_sthu", OPVUP(6,5), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7038

{"e_stwu", OPVUP(6,6), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7039

{"e_stmw", OPVUP(6,9), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7040

{"e_ldmvgprw", OPVUPRT(6,16,0),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7041

{"e_stmvgprw", OPVUPRT(6,17,0),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7042

{"e_ldmvsprw", OPVUPRT(6,16,1),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7043

{"e_stmvsprw", OPVUPRT(6,17,1),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7044

{"e_ldmvsrrw", OPVUPRT(6,16,4),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7045

{"e_stmvsrrw", OPVUPRT(6,17,4),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7046

{"e_ldmvcsrrw", OPVUPRT(6,16,5),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7047

{"e_stmvcsrrw", OPVUPRT(6,17,5),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7048

{"e_ldmvdsrrw", OPVUPRT(6,16,6),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7049

{"e_stmvdsrrw", OPVUPRT(6,17,6),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},

arch/powerpc/xmon/ppc-opc.c

7050

{"e_add16i", OP(7), OP_MASK, PPCVLE, 0, {RT, RA, SI}},

arch/powerpc/xmon/ppc-opc.c

7051

{"e_la", OP(7), OP_MASK, PPCVLE, 0, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

7052

{"e_sub16i", OP(7), OP_MASK, PPCVLE, 0, {RT, RA, NSI}},

arch/powerpc/xmon/ppc-opc.c

7054

{"se_addi", SE_IM5(8,0), SE_IM5_MASK, PPCVLE, 0, {RX, OIMM5}},

arch/powerpc/xmon/ppc-opc.c

7055

{"se_cmpli", SE_IM5(8,1), SE_IM5_MASK, PPCVLE, 0, {RX, OIMM5}},

arch/powerpc/xmon/ppc-opc.c

7056

{"se_subi", SE_IM5(9,0), SE_IM5_MASK, PPCVLE, 0, {RX, OIMM5}},

arch/powerpc/xmon/ppc-opc.c

7057

{"se_subi.", SE_IM5(9,1), SE_IM5_MASK, PPCVLE, 0, {RX, OIMM5}},

arch/powerpc/xmon/ppc-opc.c

7058

{"se_cmpi", SE_IM5(10,1), SE_IM5_MASK, PPCVLE, 0, {RX, UI5}},

arch/powerpc/xmon/ppc-opc.c

7059

{"se_bmaski", SE_IM5(11,0), SE_IM5_MASK, PPCVLE, 0, {RX, UI5}},

arch/powerpc/xmon/ppc-opc.c

7060

{"se_andi", SE_IM5(11,1), SE_IM5_MASK, PPCVLE, 0, {RX, UI5}},

arch/powerpc/xmon/ppc-opc.c

7062

{"e_lbz", OP(12), OP_MASK, PPCVLE, 0, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

7063

{"e_stb", OP(13), OP_MASK, PPCVLE, 0, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

7064

{"e_lha", OP(14), OP_MASK, PPCVLE, 0, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

7066

{"se_srw", SE_RR(16,0), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7067

{"se_sraw", SE_RR(16,1), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7068

{"se_slw", SE_RR(16,2), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7069

{"se_nop", SE_RR(17,0), 0xffff, PPCVLE, 0, {0}},

arch/powerpc/xmon/ppc-opc.c

7070

{"se_or", SE_RR(17,0), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7071

{"se_andc", SE_RR(17,1), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7072

{"se_and", SE_RR(17,2), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7073

{"se_and.", SE_RR(17,3), SE_RR_MASK, PPCVLE, 0, {RX, RY}},

arch/powerpc/xmon/ppc-opc.c

7074

{"se_li", IM7(9), IM7_MASK, PPCVLE, 0, {RX, UI7}},

arch/powerpc/xmon/ppc-opc.c

7076

{"e_lwz", OP(20), OP_MASK, PPCVLE, 0, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

7077

{"e_stw", OP(21), OP_MASK, PPCVLE, 0, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

7078

{"e_lhz", OP(22), OP_MASK, PPCVLE, 0, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

7079

{"e_sth", OP(23), OP_MASK, PPCVLE, 0, {RT, D, RA0}},

arch/powerpc/xmon/ppc-opc.c

7081

{"se_bclri", SE_IM5(24,0), SE_IM5_MASK, PPCVLE, 0, {RX, UI5}},

arch/powerpc/xmon/ppc-opc.c

7082

{"se_bgeni", SE_IM5(24,1), SE_IM5_MASK, PPCVLE, 0, {RX, UI5}},

arch/powerpc/xmon/ppc-opc.c

7083

{"se_bseti", SE_IM5(25,0), SE_IM5_MASK, PPCVLE, 0, {RX, UI5}},

arch/powerpc/xmon/ppc-opc.c

7084

{"se_btsti", SE_IM5(25,1), SE_IM5_MASK, PPCVLE, 0, {RX, UI5}},

arch/powerpc/xmon/ppc-opc.c

7085

{"se_srwi", SE_IM5(26,0), SE_IM5_MASK, PPCVLE, 0, {RX, UI5}},

arch/powerpc/xmon/ppc-opc.c

7086

{"se_srawi", SE_IM5(26,1), SE_IM5_MASK, PPCVLE, 0, {RX, UI5}},

arch/powerpc/xmon/ppc-opc.c

7087

{"se_slwi", SE_IM5(27,0), SE_IM5_MASK, PPCVLE, 0, {RX, UI5}},

arch/powerpc/xmon/ppc-opc.c

7089

{"e_lis", I16L(28,28), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},

arch/powerpc/xmon/ppc-opc.c

7090

{"e_and2is.", I16L(28,29), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},

arch/powerpc/xmon/ppc-opc.c

7091

{"e_or2is", I16L(28,26), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},

arch/powerpc/xmon/ppc-opc.c

7092

{"e_and2i.", I16L(28,25), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},

arch/powerpc/xmon/ppc-opc.c

7093

{"e_or2i", I16L(28,24), I16L_MASK, PPCVLE, 0, {RD, VLEUIMML}},

arch/powerpc/xmon/ppc-opc.c

7094

{"e_cmphl16i", IA16(28,23), IA16_MASK, PPCVLE, 0, {RA, VLEUIMM}},

arch/powerpc/xmon/ppc-opc.c

7095

{"e_cmph16i", IA16(28,22), IA16_MASK, PPCVLE, 0, {RA, VLESIMM}},

arch/powerpc/xmon/ppc-opc.c

7096

{"e_cmpl16i", I16A(28,21), I16A_MASK, PPCVLE, 0, {RA, VLEUIMM}},

arch/powerpc/xmon/ppc-opc.c

7097

{"e_mull2i", I16A(28,20), I16A_MASK, PPCVLE, 0, {RA, VLESIMM}},

arch/powerpc/xmon/ppc-opc.c

7098

{"e_cmp16i", IA16(28,19), IA16_MASK, PPCVLE, 0, {RA, VLESIMM}},

arch/powerpc/xmon/ppc-opc.c

7099

{"e_sub2is", I16A(28,18), I16A_MASK, PPCVLE, 0, {RA, VLENSIMM}},

arch/powerpc/xmon/ppc-opc.c

7100

{"e_add2is", I16A(28,18), I16A_MASK, PPCVLE, 0, {RA, VLESIMM}},

arch/powerpc/xmon/ppc-opc.c

7101

{"e_sub2i.", I16A(28,17), I16A_MASK, PPCVLE, 0, {RA, VLENSIMM}},

arch/powerpc/xmon/ppc-opc.c

7102

{"e_add2i.", I16A(28,17), I16A_MASK, PPCVLE, 0, {RA, VLESIMM}},

arch/powerpc/xmon/ppc-opc.c

7103

{"e_li", LI20(28,0), LI20_MASK, PPCVLE, 0, {RT, IMM20}},

arch/powerpc/xmon/ppc-opc.c

7104

{"e_rlwimi", M(29,0), M_MASK, PPCVLE, 0, {RA, RS, SH, MB, ME}},

arch/powerpc/xmon/ppc-opc.c

7105

{"e_rlwinm", M(29,1), M_MASK, PPCVLE, 0, {RA, RT, SH, MBE, ME}},

arch/powerpc/xmon/ppc-opc.c

7106

{"e_b", BD24(30,0,0), BD24_MASK, PPCVLE, 0, {B24}},

arch/powerpc/xmon/ppc-opc.c

7107

{"e_bl", BD24(30,0,1), BD24_MASK, PPCVLE, 0, {B24}},

arch/powerpc/xmon/ppc-opc.c

7108

{"e_bdnz", EBD15(30,8,BO32DNZ,0), EBD15_MASK, PPCVLE, 0, {B15}},

arch/powerpc/xmon/ppc-opc.c

7109

{"e_bdnzl", EBD15(30,8,BO32DNZ,1), EBD15_MASK, PPCVLE, 0, {B15}},

arch/powerpc/xmon/ppc-opc.c

7110

{"e_bdz", EBD15(30,8,BO32DZ,0), EBD15_MASK, PPCVLE, 0, {B15}},

arch/powerpc/xmon/ppc-opc.c

7111

{"e_bdzl", EBD15(30,8,BO32DZ,1), EBD15_MASK, PPCVLE, 0, {B15}},

arch/powerpc/xmon/ppc-opc.c

7112

{"e_bge", EBD15BI(30,8,BO32F,CBLT,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7113

{"e_bgel", EBD15BI(30,8,BO32F,CBLT,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7114

{"e_bnl", EBD15BI(30,8,BO32F,CBLT,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7115

{"e_bnll", EBD15BI(30,8,BO32F,CBLT,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7116

{"e_blt", EBD15BI(30,8,BO32T,CBLT,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7117

{"e_bltl", EBD15BI(30,8,BO32T,CBLT,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7118

{"e_bgt", EBD15BI(30,8,BO32T,CBGT,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7119

{"e_bgtl", EBD15BI(30,8,BO32T,CBGT,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7120

{"e_ble", EBD15BI(30,8,BO32F,CBGT,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7121

{"e_blel", EBD15BI(30,8,BO32F,CBGT,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7122

{"e_bng", EBD15BI(30,8,BO32F,CBGT,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7123

{"e_bngl", EBD15BI(30,8,BO32F,CBGT,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7124

{"e_bne", EBD15BI(30,8,BO32F,CBEQ,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7125

{"e_bnel", EBD15BI(30,8,BO32F,CBEQ,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7126

{"e_beq", EBD15BI(30,8,BO32T,CBEQ,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7127

{"e_beql", EBD15BI(30,8,BO32T,CBEQ,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7128

{"e_bso", EBD15BI(30,8,BO32T,CBSO,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7129

{"e_bsol", EBD15BI(30,8,BO32T,CBSO,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7130

{"e_bun", EBD15BI(30,8,BO32T,CBSO,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7131

{"e_bunl", EBD15BI(30,8,BO32T,CBSO,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7132

{"e_bns", EBD15BI(30,8,BO32F,CBSO,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7133

{"e_bnsl", EBD15BI(30,8,BO32F,CBSO,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7134

{"e_bnu", EBD15BI(30,8,BO32F,CBSO,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7135

{"e_bnul", EBD15BI(30,8,BO32F,CBSO,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},

arch/powerpc/xmon/ppc-opc.c

7136

{"e_bc", BD15(30,8,0), BD15_MASK, PPCVLE, 0, {BO32, BI32, B15}},

arch/powerpc/xmon/ppc-opc.c

7137

{"e_bcl", BD15(30,8,1), BD15_MASK, PPCVLE, 0, {BO32, BI32, B15}},

arch/powerpc/xmon/ppc-opc.c

7139

{"e_bf", EBD15(30,8,BO32F,0), EBD15_MASK, PPCVLE, 0, {BI32,B15}},

arch/powerpc/xmon/ppc-opc.c

7140

{"e_bfl", EBD15(30,8,BO32F,1), EBD15_MASK, PPCVLE, 0, {BI32,B15}},

arch/powerpc/xmon/ppc-opc.c

7141

{"e_bt", EBD15(30,8,BO32T,0), EBD15_MASK, PPCVLE, 0, {BI32,B15}},

arch/powerpc/xmon/ppc-opc.c

7142

{"e_btl", EBD15(30,8,BO32T,1), EBD15_MASK, PPCVLE, 0, {BI32,B15}},

arch/powerpc/xmon/ppc-opc.c

7144

{"e_cmph", X(31,14), X_MASK, PPCVLE, 0, {CRD, RA, RB}},

arch/powerpc/xmon/ppc-opc.c

7145

{"e_cmphl", X(31,46), X_MASK, PPCVLE, 0, {CRD, RA, RB}},

arch/powerpc/xmon/ppc-opc.c

7146

{"e_crandc", XL(31,129), XL_MASK, PPCVLE, 0, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

7147

{"e_crnand", XL(31,225), XL_MASK, PPCVLE, 0, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

7148

{"e_crnot", XL(31,33), XL_MASK, PPCVLE, 0, {BT, BA, BBA}},

arch/powerpc/xmon/ppc-opc.c

7149

{"e_crnor", XL(31,33), XL_MASK, PPCVLE, 0, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

7150

{"e_crclr", XL(31,193), XL_MASK, PPCVLE, 0, {BT, BAT, BBA}},

arch/powerpc/xmon/ppc-opc.c

7151

{"e_crxor", XL(31,193), XL_MASK, PPCVLE, 0, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

7152

{"e_mcrf", XL(31,16), XL_MASK, PPCVLE, 0, {CRD, CR}},

arch/powerpc/xmon/ppc-opc.c

7153

{"e_slwi", EX(31,112), EX_MASK, PPCVLE, 0, {RA, RS, SH}},

arch/powerpc/xmon/ppc-opc.c

7154

{"e_slwi.", EX(31,113), EX_MASK, PPCVLE, 0, {RA, RS, SH}},

arch/powerpc/xmon/ppc-opc.c

7156

{"e_crand", XL(31,257), XL_MASK, PPCVLE, 0, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

7158

{"e_rlw", EX(31,560), EX_MASK, PPCVLE, 0, {RA, RS, RB}},

arch/powerpc/xmon/ppc-opc.c

7159

{"e_rlw.", EX(31,561), EX_MASK, PPCVLE, 0, {RA, RS, RB}},

arch/powerpc/xmon/ppc-opc.c

7161

{"e_crset", XL(31,289), XL_MASK, PPCVLE, 0, {BT, BAT, BBA}},

arch/powerpc/xmon/ppc-opc.c

7162

{"e_creqv", XL(31,289), XL_MASK, PPCVLE, 0, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

7164

{"e_rlwi", EX(31,624), EX_MASK, PPCVLE, 0, {RA, RS, SH}},

arch/powerpc/xmon/ppc-opc.c

7165

{"e_rlwi.", EX(31,625), EX_MASK, PPCVLE, 0, {RA, RS, SH}},

arch/powerpc/xmon/ppc-opc.c

7167

{"e_crorc", XL(31,417), XL_MASK, PPCVLE, 0, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

7169

{"e_crmove", XL(31,449), XL_MASK, PPCVLE, 0, {BT, BA, BBA}},

arch/powerpc/xmon/ppc-opc.c

7170

{"e_cror", XL(31,449), XL_MASK, PPCVLE, 0, {BT, BA, BB}},

arch/powerpc/xmon/ppc-opc.c

7172

{"mtmas1", XSPR(31,467,625), XSPR_MASK, PPCVLE, 0, {RS}},

arch/powerpc/xmon/ppc-opc.c

7174

{"e_srwi", EX(31,1136), EX_MASK, PPCVLE, 0, {RA, RS, SH}},

arch/powerpc/xmon/ppc-opc.c

7175

{"e_srwi.", EX(31,1137), EX_MASK, PPCVLE, 0, {RA, RS, SH}},

arch/powerpc/xmon/ppc-opc.c

7177

{"se_lbz", SD4(8), SD4_MASK, PPCVLE, 0, {RZ, SE_SD, RX}},

arch/powerpc/xmon/ppc-opc.c

7179

{"se_stb", SD4(9), SD4_MASK, PPCVLE, 0, {RZ, SE_SD, RX}},

arch/powerpc/xmon/ppc-opc.c

7181

{"se_lhz", SD4(10), SD4_MASK, PPCVLE, 0, {RZ, SE_SDH, RX}},

arch/powerpc/xmon/ppc-opc.c

7183

{"se_sth", SD4(11), SD4_MASK, PPCVLE, 0, {RZ, SE_SDH, RX}},

arch/powerpc/xmon/ppc-opc.c

7185

{"se_lwz", SD4(12), SD4_MASK, PPCVLE, 0, {RZ, SE_SDW, RX}},

arch/powerpc/xmon/ppc-opc.c

7187

{"se_stw", SD4(13), SD4_MASK, PPCVLE, 0, {RZ, SE_SDW, RX}},

arch/powerpc/xmon/ppc-opc.c

7189

{"se_bge", EBD8IO(28,0,0), EBD8IO3_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7190

{"se_bnl", EBD8IO(28,0,0), EBD8IO3_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7191

{"se_ble", EBD8IO(28,0,1), EBD8IO3_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7192

{"se_bng", EBD8IO(28,0,1), EBD8IO3_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7193

{"se_bne", EBD8IO(28,0,2), EBD8IO3_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7194

{"se_bns", EBD8IO(28,0,3), EBD8IO3_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7195

{"se_bnu", EBD8IO(28,0,3), EBD8IO3_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7196

{"se_bf", EBD8IO(28,0,0), EBD8IO2_MASK, PPCVLE, 0, {BI16, B8}},

arch/powerpc/xmon/ppc-opc.c

7197

{"se_blt", EBD8IO(28,1,0), EBD8IO3_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7198

{"se_bgt", EBD8IO(28,1,1), EBD8IO3_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7199

{"se_beq", EBD8IO(28,1,2), EBD8IO3_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7200

{"se_bso", EBD8IO(28,1,3), EBD8IO3_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7201

{"se_bun", EBD8IO(28,1,3), EBD8IO3_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7202

{"se_bt", EBD8IO(28,1,0), EBD8IO2_MASK, PPCVLE, 0, {BI16, B8}},

arch/powerpc/xmon/ppc-opc.c

7203

{"se_bc", BD8IO(28), BD8IO_MASK, PPCVLE, 0, {BO16, BI16, B8}},

arch/powerpc/xmon/ppc-opc.c

7204

{"se_b", BD8(58,0,0), BD8_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7205

{"se_bl", BD8(58,0,1), BD8_MASK, PPCVLE, 0, {B8}},

arch/powerpc/xmon/ppc-opc.c

7263

{"e_extlwi", 4, PPCVLE, "e_rlwinm %0,%1,%3,0,(%2)-1"},

arch/powerpc/xmon/ppc-opc.c

7264

{"e_extrwi", 4, PPCVLE, "e_rlwinm %0,%1,((%2)+(%3))&((%2)+(%3)<>32),32-(%2),31"},

arch/powerpc/xmon/ppc-opc.c

7265

{"e_inslwi", 4, PPCVLE, "e_rlwimi %0,%1,(-(%3)!31)&((%3)|31),%3,(%2)+(%3)-1"},

arch/powerpc/xmon/ppc-opc.c

7266

{"e_insrwi", 4, PPCVLE, "e_rlwimi %0,%1,32-((%2)+(%3)),%3,(%2)+(%3)-1"},

arch/powerpc/xmon/ppc-opc.c

7267

{"e_rotlwi", 3, PPCVLE, "e_rlwinm %0,%1,%2,0,31"},

arch/powerpc/xmon/ppc-opc.c

7268

{"e_rotrwi", 3, PPCVLE, "e_rlwinm %0,%1,(-(%2)!31)&((%2)|31),0,31"},

arch/powerpc/xmon/ppc-opc.c

7269

{"e_slwi", 3, PPCVLE, "e_rlwinm %0,%1,%2,0,31-(%2)"},

arch/powerpc/xmon/ppc-opc.c

7270

{"e_srwi", 3, PPCVLE, "e_rlwinm %0,%1,(-(%2)!31)&((%2)|31),%2,31"},

arch/powerpc/xmon/ppc-opc.c

7271

{"e_clrlwi", 3, PPCVLE, "e_rlwinm %0,%1,0,%2,31"},

arch/powerpc/xmon/ppc-opc.c

7272

{"e_clrrwi", 3, PPCVLE, "e_rlwinm %0,%1,0,0,31-(%2)"},

arch/powerpc/xmon/ppc-opc.c

7273

{"e_clrlslwi",4, PPCVLE, "e_rlwinm %0,%1,%3,(%2)-(%3),31-(%3)"},