PRCM_IDX_GPIOCR1
true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[1] */
PRCM_GPIOCR_ALTCX(27, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[2] */
true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[2] */
PRCM_GPIOCR_ALTCX(28, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[3] */
true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[3] */
true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
PRCM_GPIOCR_ALTCX(68, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */
PRCM_GPIOCR_ALTCX(69, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */
PRCM_GPIOCR_ALTCX(70, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D23 */
true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
true, PRCM_IDX_GPIOCR1, 8 /* SBAG_CLK */
PRCM_GPIOCR_ALTCX(71, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D22 */
true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D3 */
PRCM_GPIOCR_ALTCX(72, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D21 */
true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D2 */
PRCM_GPIOCR_ALTCX(73, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D20 */
true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D1 */
PRCM_GPIOCR_ALTCX(74, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D19 */
true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D0 */
PRCM_GPIOCR_ALTCX(75, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D18 */
true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */
PRCM_GPIOCR_ALTCX(76, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D17 */
true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */
PRCM_GPIOCR_ALTCX(77, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D16 */
true, PRCM_IDX_GPIOCR1, 8 /* SBAG_VAL */
PRCM_GPIOCR_ALTCX(86, true, PRCM_IDX_GPIOCR1, 12, /* KP_O3 */
PRCM_GPIOCR_ALTCX(87, true, PRCM_IDX_GPIOCR1, 12, /* KP_O2 */
PRCM_GPIOCR_ALTCX(88, true, PRCM_IDX_GPIOCR1, 12, /* KP_I3 */
PRCM_GPIOCR_ALTCX(89, true, PRCM_IDX_GPIOCR1, 12, /* KP_I2 */
PRCM_GPIOCR_ALTCX(90, true, PRCM_IDX_GPIOCR1, 12, /* KP_O1 */
PRCM_GPIOCR_ALTCX(91, true, PRCM_IDX_GPIOCR1, 12, /* KP_O0 */
PRCM_GPIOCR_ALTCX(92, true, PRCM_IDX_GPIOCR1, 12, /* KP_I1 */
PRCM_GPIOCR_ALTCX(93, true, PRCM_IDX_GPIOCR1, 12, /* KP_I0 */
true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CTL */
true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS17 */
PRCM_GPIOCR_ALTCX(152, true, PRCM_IDX_GPIOCR1, 4, /* Hx_CLK */
true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CLK */
true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS16 */
PRCM_GPIOCR_ALTCX(153, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */
true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D15 */
true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS15 */
PRCM_GPIOCR_ALTCX(154, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */
true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D14 */
true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS14 */
PRCM_GPIOCR_ALTCX(155, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D13 */
true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS13 */
PRCM_GPIOCR_ALTCX(156, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D12 */
true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS12 */
PRCM_GPIOCR_ALTCX(157, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D11 */
true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS11 */
PRCM_GPIOCR_ALTCX(158, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D10 */
true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS10 */
PRCM_GPIOCR_ALTCX(159, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D9 */
true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS9 */
true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D8 */
true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS8 */
PRCM_GPIOCR_ALTCX(161, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO7 */
true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D7 */
true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS7 */
PRCM_GPIOCR_ALTCX(162, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO6 */
true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D6 */
true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS6 */
PRCM_GPIOCR_ALTCX(163, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO5 */
true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D5 */
true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS5 */
PRCM_GPIOCR_ALTCX(164, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO4 */
true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D4 */
true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS4 */
PRCM_GPIOCR_ALTCX(165, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO3 */
true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D3 */
true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS3 */
PRCM_GPIOCR_ALTCX(166, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO2 */
true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D2 */
true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS2 */
PRCM_GPIOCR_ALTCX(167, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO1 */
true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D1 */
true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS1 */
PRCM_GPIOCR_ALTCX(168, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO0 */
true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D0 */
true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS0 */
PRCM_GPIOCR_ALTCX(215, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_TXD */
PRCM_GPIOCR_ALTCX(216, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_FRM */
PRCM_GPIOCR_ALTCX(217, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_CLK */
PRCM_GPIOCR_ALTCX(218, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_RXD */
[PRCM_IDX_GPIOCR1] = 0x138,
PRCM_GPIOCR_ALTCX(23, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_CLK_a */
true, PRCM_IDX_GPIOCR1, 7, /* SBAG_CLK_a */
PRCM_GPIOCR_ALTCX(24, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE or U2_RXD ??? */
true, PRCM_IDX_GPIOCR1, 7, /* SBAG_VAL_a */
true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
PRCM_GPIOCR_ALTCX(25, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[0] */
true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[0] */
PRCM_GPIOCR_ALTCX(26, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[1] */