PORT_PLL_N_MASK
#define PORT_PLL_N(n) REG_FIELD_PREP(PORT_PLL_N_MASK, (n))
PORT_PLL_N_MASK, hw_state->pll1);
hw_state->pll1 &= PORT_PLL_N_MASK;
clock.n = REG_FIELD_GET(PORT_PLL_N_MASK, hw_state->pll1);
n = REG_FIELD_GET(PORT_PLL_N_MASK, vgpu_vreg_t(vgpu, BXT_PORT_PLL(phy, ch, 1)));