drivers/gpu/drm/i915/display/intel_bios.c

3675

[AUX_CH_B] = DP_AUX_B,

drivers/gpu/drm/i915/display/intel_bios.c

3703

[AUX_CH_B] = DP_AUX_B,

drivers/gpu/drm/i915/display/intel_bios.c

3710

[AUX_CH_B] = DP_AUX_B,

drivers/gpu/drm/i915/display/intel_display_power.c

2392

.aux_ch_end = AUX_CH_B,

drivers/gpu/drm/i915/display/intel_display_power_map.c

1515

I915_PW("AUX_B", &icl_pwdoms_aux_b, .xelpdp.aux_ch = AUX_CH_B),

drivers/gpu/drm/i915/display/intel_display_power_map.c

1745

I915_PW("AUX_B", &icl_pwdoms_aux_b, .xelpdp.aux_ch = AUX_CH_B),

drivers/gpu/drm/i915/display/intel_dp_aux.c

575

case AUX_CH_B:

drivers/gpu/drm/i915/display/intel_dp_aux.c

581

return VLV_DP_AUX_CH_CTL(AUX_CH_B);

drivers/gpu/drm/i915/display/intel_dp_aux.c

591

case AUX_CH_B:

drivers/gpu/drm/i915/display/intel_dp_aux.c

597

return VLV_DP_AUX_CH_DATA(AUX_CH_B, index);

drivers/gpu/drm/i915/display/intel_dp_aux.c

607

case AUX_CH_B:

drivers/gpu/drm/i915/display/intel_dp_aux.c

613

return DP_AUX_CH_CTL(AUX_CH_B);

drivers/gpu/drm/i915/display/intel_dp_aux.c

623

case AUX_CH_B:

drivers/gpu/drm/i915/display/intel_dp_aux.c

629

return DP_AUX_CH_DATA(AUX_CH_B, index);

drivers/gpu/drm/i915/display/intel_dp_aux.c

641

case AUX_CH_B:

drivers/gpu/drm/i915/display/intel_dp_aux.c

659

case AUX_CH_B:

drivers/gpu/drm/i915/display/intel_dp_aux.c

676

case AUX_CH_B:

drivers/gpu/drm/i915/display/intel_dp_aux.c

695

case AUX_CH_B:

drivers/gpu/drm/i915/display/intel_dp_aux.c

714

case AUX_CH_B:

drivers/gpu/drm/i915/display/intel_dp_aux.c

736

case AUX_CH_B:

drivers/gpu/drm/i915/display/intel_dp_aux.c

759

case AUX_CH_B:

drivers/gpu/drm/i915/display/intel_dp_aux.c

779

case AUX_CH_B:

drivers/gpu/drm/i915/display/intel_dp_aux_regs.h

33

#define PCH_DP_AUX_CH_CTL(aux_ch) _MMIO_PORT((aux_ch) - AUX_CH_B, _PCH_DPB_AUX_CH_CTL, _PCH_DPC_AUX_CH_CTL)

drivers/gpu/drm/i915/display/intel_dp_aux_regs.h

87

#define PCH_DP_AUX_CH_DATA(aux_ch, i) _MMIO(_PORT((aux_ch) - AUX_CH_B, _PCH_DPB_AUX_CH_DATA1, _PCH_DPC_AUX_CH_DATA1) + (i) * 4) /* 5 registers */

drivers/gpu/drm/i915/gvt/handlers.c

1104

else if (reg == i915_mmio_reg_offset(PCH_DP_AUX_CH_CTL(AUX_CH_B)) ||

drivers/gpu/drm/i915/gvt/handlers.c

1105

reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_B)))

drivers/gpu/drm/i915/gvt/handlers.c

2330

MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_B), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2621

MMIO_F(DP_AUX_CH_CTL(AUX_CH_B), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL,

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

907

MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_B), 6 * 4);

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

931

MMIO_F(DP_AUX_CH_CTL(AUX_CH_B), 6 * 4);