drivers/clk/ux500/u8500_of_clk.c

280

u8500_prcmu_hw_clks.hws[PRCMU_DSI0CLK] =

drivers/clk/ux500/u8500_of_clk.c

282

PRCMU_DSI0CLK, 0, CLK_SET_RATE_GATE);

drivers/mfd/db8500-prcmu.c

1381

else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK))

drivers/mfd/db8500-prcmu.c

1382

return request_dsiclk((clock - PRCMU_DSI0CLK), enable);

drivers/mfd/db8500-prcmu.c

1558

else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK))

drivers/mfd/db8500-prcmu.c

1559

return dsiclk_rate(clock - PRCMU_DSI0CLK);

drivers/mfd/db8500-prcmu.c

1739

else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK))

drivers/mfd/db8500-prcmu.c

1911

else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK))

drivers/mfd/db8500-prcmu.c

1912

set_dsiclk_rate((clock - PRCMU_DSI0CLK), rate);