Symbol: PPC_BIT32
arch/powerpc/include/asm/bitops.h
56
#define PPC_BITMASK32(bs, be) ((PPC_BIT32(bs) - PPC_BIT32(be))|PPC_BIT32(bs))
arch/powerpc/include/asm/plpks.h
19
#define PLPKS_OSSECBOOTAUDIT PPC_BIT32(1) // OS secure boot must be audit/enforce
arch/powerpc/include/asm/plpks.h
20
#define PLPKS_OSSECBOOTENFORCE PPC_BIT32(2) // OS secure boot must be enforce
arch/powerpc/include/asm/plpks.h
21
#define PLPKS_PWSET PPC_BIT32(3) // No access without password set
arch/powerpc/include/asm/plpks.h
22
#define PLPKS_WORLDREADABLE PPC_BIT32(4) // Readable without authentication
arch/powerpc/include/asm/plpks.h
23
#define PLPKS_IMMUTABLE PPC_BIT32(5) // Once written, object cannot be removed
arch/powerpc/include/asm/plpks.h
24
#define PLPKS_TRANSIENT PPC_BIT32(6) // Object does not persist through reboot
arch/powerpc/include/asm/plpks.h
25
#define PLPKS_SIGNEDUPDATE PPC_BIT32(7) // Object can only be modified by signed updates
arch/powerpc/include/asm/plpks.h
26
#define PLPKS_WRAPPINGKEY PPC_BIT32(8) // Object contains a wrapping key
arch/powerpc/include/asm/plpks.h
27
#define PLPKS_HVPROVISIONED PPC_BIT32(28) // Hypervisor has provisioned this object
arch/powerpc/include/asm/xive-regs.h
80
#define TM_QW0W2_VU PPC_BIT32(0)
arch/powerpc/include/asm/xive-regs.h
82
#define TM_QW1W2_VO PPC_BIT32(0)
arch/powerpc/include/asm/xive-regs.h
83
#define TM_QW1W2_HO PPC_BIT32(1) /* P10 XIVE2 */
arch/powerpc/include/asm/xive-regs.h
85
#define TM_QW2W2_VP PPC_BIT32(0)
arch/powerpc/include/asm/xive-regs.h
86
#define TM_QW2W2_HP PPC_BIT32(1) /* P10 XIVE2 */
arch/powerpc/include/asm/xive-regs.h
88
#define TM_QW3W2_VT PPC_BIT32(0)
arch/powerpc/include/asm/xive-regs.h
89
#define TM_QW3W2_HT PPC_BIT32(1) /* P10 XIVE2 */
arch/powerpc/include/asm/xive-regs.h
90
#define TM_QW3W2_LP PPC_BIT32(6)
arch/powerpc/include/asm/xive-regs.h
91
#define TM_QW3W2_LE PPC_BIT32(7)
arch/powerpc/include/asm/xive-regs.h
92
#define TM_QW3W2_T PPC_BIT32(31)