Symbol: PPC_BIT
arch/powerpc/include/asm/bitops.h
48
#define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
arch/powerpc/include/asm/plpks.h
30
#define PLPKS_ALG_RSA2048 PPC_BIT(0)
arch/powerpc/include/asm/plpks.h
31
#define PLPKS_ALG_RSA4096 PPC_BIT(1)
arch/powerpc/include/asm/pnv-ocxl.h
18
#define PNV_OCXL_ATSD_LNCH_R PPC_BIT(0)
arch/powerpc/include/asm/pnv-ocxl.h
34
#define PNV_OCXL_ATSD_LNCH_PRS PPC_BIT(13)
arch/powerpc/include/asm/pnv-ocxl.h
36
#define PNV_OCXL_ATSD_LNCH_B PPC_BIT(14)
arch/powerpc/include/asm/pnv-ocxl.h
48
#define PNV_OCXL_ATSD_LNCH_L PPC_BIT(18)
arch/powerpc/include/asm/pnv-ocxl.h
52
#define PNV_OCXL_ATSD_LNCH_F PPC_BIT(39)
arch/powerpc/include/asm/pnv-ocxl.h
53
#define PNV_OCXL_ATSD_LNCH_OCAPI_SLBI PPC_BIT(40)
arch/powerpc/include/asm/pnv-ocxl.h
54
#define PNV_OCXL_ATSD_LNCH_OCAPI_SINGLETON PPC_BIT(41)
arch/powerpc/include/asm/vas.h
250
#define VAS_GZIP_QOS_FEAT_BIT PPC_BIT(VAS_GZIP_QOS_FEAT) /* Bit 1 */
arch/powerpc/include/asm/vas.h
251
#define VAS_GZIP_DEF_FEAT_BIT PPC_BIT(VAS_GZIP_DEF_FEAT) /* Bit 2 */
arch/powerpc/include/asm/vas.h
255
#define VAS_NX_GZIP_FEAT_BIT PPC_BIT(VAS_NX_GZIP_FEAT) /* Bit 1 */
arch/powerpc/kernel/dt_cpu_ftrs.c
349
hfscr |= PPC_BIT(60);
arch/powerpc/kernel/mce_power.c
135
#define SRR1_MC_LOADSTORE(srr1) ((srr1) & PPC_BIT(42))
arch/powerpc/kernel/mce_power.c
766
srr1 &= ~PPC_BIT(42);
arch/powerpc/kernel/mce_power.c
786
srr1 &= ~PPC_BIT(42);
arch/powerpc/kvm/book3s_hv_builtin.c
609
rb = PPC_BIT(52); /* IS = 2 */
arch/powerpc/kvm/book3s_hv_builtin.c
615
rb += PPC_BIT(51); /* increment set number */
arch/powerpc/kvm/book3s_hv_p9_entry.c
423
rb = PPC_BIT(52); /* IS = 2 */
arch/powerpc/kvm/book3s_hv_p9_entry.c
430
rb += PPC_BIT(51); /* increment set number */
arch/powerpc/kvm/book3s_hv_p9_entry.c
445
rb += PPC_BIT(51); /* increment set number */
arch/powerpc/kvm/book3s_hv_rm_mmu.c
431
rb = PPC_BIT(52); /* IS = 2 */
arch/powerpc/lib/sstep.c
1282
if (v2 & PPC_BIT(idx))
arch/powerpc/mm/book3s64/hash_native.c
132
rb = PPC_BIT(52); /* IS = 2 */
arch/powerpc/mm/book3s64/radix_tlb.c
105
rb = PPC_BIT(53); /* IS = 1 */
arch/powerpc/mm/book3s64/radix_tlb.c
120
rb = PPC_BIT(53); /* IS = 1 */
arch/powerpc/mm/book3s64/radix_tlb.c
134
rb = PPC_BIT(52); /* IS = 2 */
arch/powerpc/mm/book3s64/radix_tlb.c
1408
rb = PPC_BIT(53); /* IS = 1 */
arch/powerpc/mm/book3s64/radix_tlb.c
148
rb = PPC_BIT(52); /* IS = 2 */
arch/powerpc/platforms/powernv/idle.c
729
mmcra |= PPC_BIT(60);
arch/powerpc/platforms/powernv/idle.c
731
mmcra &= ~PPC_BIT(60);
arch/powerpc/platforms/powernv/pci-ioda.c
1170
#define PHB3_TCE_KILL_INVAL_ALL PPC_BIT(0)
arch/powerpc/platforms/powernv/pci-ioda.c
1171
#define PHB3_TCE_KILL_INVAL_PE PPC_BIT(1)
arch/powerpc/platforms/powernv/pci-ioda.c
1172
#define PHB3_TCE_KILL_INVAL_ONE PPC_BIT(2)
arch/powerpc/platforms/powernv/smp.c
57
mtspr(SPRN_HMEER, mfspr(SPRN_HMEER) | PPC_BIT(17));
arch/powerpc/platforms/powernv/vas-window.c
1097
#define RMA_LSMP_REPORT_ENABLE PPC_BIT(53)
arch/powerpc/platforms/powernv/vas.h
121
#define VAS_XLATE_MSR_DR PPC_BIT(0)
arch/powerpc/platforms/powernv/vas.h
122
#define VAS_XLATE_MSR_TA PPC_BIT(1)
arch/powerpc/platforms/powernv/vas.h
123
#define VAS_XLATE_MSR_PR PPC_BIT(2)
arch/powerpc/platforms/powernv/vas.h
124
#define VAS_XLATE_MSR_US PPC_BIT(3)
arch/powerpc/platforms/powernv/vas.h
125
#define VAS_XLATE_MSR_HV PPC_BIT(4)
arch/powerpc/platforms/powernv/vas.h
126
#define VAS_XLATE_MSR_SF PPC_BIT(5)
arch/powerpc/platforms/powernv/vas.h
130
#define VAS_XLATE_LPCR_ISL PPC_BIT(3)
arch/powerpc/platforms/powernv/vas.h
131
#define VAS_XLATE_LPCR_TC PPC_BIT(4)
arch/powerpc/platforms/powernv/vas.h
132
#define VAS_XLATE_LPCR_SC PPC_BIT(5)
arch/powerpc/platforms/powernv/vas.h
168
#define VAS_XTRA_WRITE PPC_BIT(2)
arch/powerpc/platforms/powernv/vas.h
172
#define VAS_LDMA_FIFO_DISABLE PPC_BIT(2)
arch/powerpc/platforms/powernv/vas.h
199
#define VAS_WINCTL_OPEN PPC_BIT(0)
arch/powerpc/platforms/powernv/vas.h
200
#define VAS_WINCTL_REJ_NO_CREDIT PPC_BIT(1)
arch/powerpc/platforms/powernv/vas.h
201
#define VAS_WINCTL_PIN PPC_BIT(2)
arch/powerpc/platforms/powernv/vas.h
202
#define VAS_WINCTL_TX_WCRED_MODE PPC_BIT(3)
arch/powerpc/platforms/powernv/vas.h
203
#define VAS_WINCTL_RX_WCRED_MODE PPC_BIT(4)
arch/powerpc/platforms/powernv/vas.h
204
#define VAS_WINCTL_TX_WORD_MODE PPC_BIT(5)
arch/powerpc/platforms/powernv/vas.h
205
#define VAS_WINCTL_RX_WORD_MODE PPC_BIT(6)
arch/powerpc/platforms/powernv/vas.h
206
#define VAS_WINCTL_RSVD_TXBUF PPC_BIT(7)
arch/powerpc/platforms/powernv/vas.h
208
#define VAS_WINCTL_FAULT_WIN PPC_BIT(10)
arch/powerpc/platforms/powernv/vas.h
209
#define VAS_WINCTL_NX_WIN PPC_BIT(11)
arch/powerpc/platforms/powernv/vas.h
212
#define VAS_WIN_BUSY PPC_BIT(1)
arch/powerpc/platforms/powernv/vas.h
215
#define VAS_CASTOUT_REQ PPC_BIT(0)
arch/powerpc/platforms/powernv/vas.h
216
#define VAS_PUSH_TO_MEM PPC_BIT(1)
arch/powerpc/platforms/powernv/vas.h
217
#define VAS_WIN_CACHE_STATUS PPC_BIT(4)
arch/powerpc/platforms/powernv/vas.h
230
#define VAS_NOTIFY_DISABLE PPC_BIT(0)
arch/powerpc/platforms/powernv/vas.h
231
#define VAS_INTR_DISABLE PPC_BIT(1)
arch/powerpc/platforms/powernv/vas.h
232
#define VAS_NOTIFY_EARLY PPC_BIT(2)
arch/powerpc/platforms/powernv/vas.h
233
#define VAS_NOTIFY_OSU_INTR PPC_BIT(3)
arch/powerpc/platforms/pseries/vas.h
15
#define VAS_MOD_WIN_CLOSE PPC_BIT(0)
arch/powerpc/platforms/pseries/vas.h
16
#define VAS_MOD_WIN_JOBS_KILL PPC_BIT(1)
arch/powerpc/platforms/pseries/vas.h
17
#define VAS_MOD_WIN_DR PPC_BIT(3)
arch/powerpc/platforms/pseries/vas.h
18
#define VAS_MOD_WIN_PR PPC_BIT(4)
arch/powerpc/platforms/pseries/vas.h
19
#define VAS_MOD_WIN_SF PPC_BIT(5)
arch/powerpc/platforms/pseries/vas.h
20
#define VAS_MOD_WIN_TA PPC_BIT(6)
drivers/misc/ocxl/link.c
124
reg = PPC_BIT(31);
drivers/misc/ocxl/link.c
126
reg = PPC_BIT(30);