arch/powerpc/xmon/ppc-opc.c
3088
{"vaddubm", VX (4, 0), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3090
{"vmaxub", VX (4, 2), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3091
{"vrlb", VX (4, 4), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3092
{"vcmpequb", VXR(4, 6,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3094
{"vmuloub", VX (4, 8), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3095
{"vaddfp", VX (4, 10), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3097
{"vmrghb", VX (4, 12), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3099
{"vpkuhum", VX (4, 14), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3116
{"vmhaddshs", VXA(4, 32), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
arch/powerpc/xmon/ppc-opc.c
3117
{"vmhraddshs", VXA(4, 33), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
arch/powerpc/xmon/ppc-opc.c
3118
{"vmladduhm", VXA(4, 34), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
arch/powerpc/xmon/ppc-opc.c
3121
{"vmsumubm", VXA(4, 36), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
arch/powerpc/xmon/ppc-opc.c
3123
{"vmsummbm", VXA(4, 37), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
arch/powerpc/xmon/ppc-opc.c
3124
{"vmsumuhm", VXA(4, 38), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
arch/powerpc/xmon/ppc-opc.c
3125
{"vmsumuhs", VXA(4, 39), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
arch/powerpc/xmon/ppc-opc.c
3127
{"vmsumshm", VXA(4, 40), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
arch/powerpc/xmon/ppc-opc.c
3129
{"vmsumshs", VXA(4, 41), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
arch/powerpc/xmon/ppc-opc.c
3131
{"vsel", VXA(4, 42), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
arch/powerpc/xmon/ppc-opc.c
3133
{"vperm", VXA(4, 43), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
arch/powerpc/xmon/ppc-opc.c
3134
{"vsldoi", VXA(4, 44), VXASHB_MASK, PPCVEC, 0, {VD, VA, VB, SHB}},
arch/powerpc/xmon/ppc-opc.c
3137
{"vmaddfp", VXA(4, 46), VXA_MASK, PPCVEC, 0, {VD, VA, VC, VB}},
arch/powerpc/xmon/ppc-opc.c
3139
{"vnmsubfp", VXA(4, 47), VXA_MASK, PPCVEC, 0, {VD, VA, VC, VB}},
arch/powerpc/xmon/ppc-opc.c
3163
{"vadduhm", VX (4, 64), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3165
{"vmaxuh", VX (4, 66), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3166
{"vrlh", VX (4, 68), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3167
{"vcmpequh", VXR(4, 70,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3169
{"vmulouh", VX (4, 72), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3170
{"vsubfp", VX (4, 74), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3172
{"vmrghh", VX (4, 76), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3174
{"vpkuwum", VX (4, 78), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3184
{"vadduwm", VX (4, 128), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3185
{"vmaxuw", VX (4, 130), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3186
{"vrlw", VX (4, 132), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3188
{"vcmpequw", VXR(4, 134,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3192
{"vmrghw", VX (4, 140), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3193
{"vpkuhus", VX (4, 142), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3203
{"vcmpeqfp", VXR(4, 198,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3205
{"vpkuwus", VX (4, 206), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3211
{"vmaxsb", VX (4, 258), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3212
{"vslb", VX (4, 260), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3214
{"vmulosb", VX (4, 264), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3215
{"vrefp", VX (4, 266), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3216
{"vmrglb", VX (4, 268), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3217
{"vpkshus", VX (4, 270), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3225
{"vmaxsh", VX (4, 322), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3226
{"vslh", VX (4, 324), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3228
{"vmulosh", VX (4, 328), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3229
{"vrsqrtefp", VX (4, 330), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3230
{"vmrglh", VX (4, 332), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3231
{"vpkswus", VX (4, 334), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3238
{"vaddcuw", VX (4, 384), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3239
{"vmaxsw", VX (4, 386), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3240
{"vslw", VX (4, 388), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3244
{"vexptefp", VX (4, 394), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3245
{"vmrglw", VX (4, 396), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3246
{"vpkshss", VX (4, 398), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3250
{"vsl", VX (4, 452), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3252
{"vcmpgefp", VXR(4, 454,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3253
{"vlogefp", VX (4, 458), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3254
{"vpkswss", VX (4, 462), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3260
{"vaddubs", VX (4, 512), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3263
{"vminub", VX (4, 514), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3266
{"vsrb", VX (4, 516), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3269
{"vcmpgtub", VXR(4, 518,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3271
{"vmuleub", VX (4, 520), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3274
{"vrfin", VX (4, 522), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3277
{"vspltb", VX (4, 524), VXUIMM4_MASK, PPCVEC, 0, {VD, VB, UIMM4}},
arch/powerpc/xmon/ppc-opc.c
3281
{"vupkhsb", VX (4, 526), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3316
{"vadduhs", VX (4, 576), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3318
{"vminuh", VX (4, 578), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3319
{"vsrh", VX (4, 580), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3320
{"vcmpgtuh", VXR(4, 582,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3321
{"vmuleuh", VX (4, 584), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3322
{"vrfiz", VX (4, 586), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3323
{"vsplth", VX (4, 588), VXUIMM3_MASK, PPCVEC, 0, {VD, VB, UIMM3}},
arch/powerpc/xmon/ppc-opc.c
3325
{"vupkhsh", VX (4, 590), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3330
{"vadduws", VX (4, 640), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3332
{"vminuw", VX (4, 642), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3334
{"vsrw", VX (4, 644), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3337
{"vcmpgtuw", VXR(4, 646,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3341
{"vrfip", VX (4, 650), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3343
{"vspltw", VX (4, 652), VXUIMM2_MASK, PPCVEC, 0, {VD, VB, UIMM2}},
arch/powerpc/xmon/ppc-opc.c
3347
{"vupklsb", VX (4, 654), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3367
{"vsr", VX (4, 708), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3370
{"vcmpgtfp", VXR(4, 710,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3374
{"vrfim", VX (4, 714), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3379
{"vupklsh", VX (4, 718), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3425
{"vaddsbs", VX (4, 768), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3428
{"vminsb", VX (4, 770), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3431
{"vsrab", VX (4, 772), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3433
{"vcmpgtsb", VXR(4, 774,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3435
{"vmulesb", VX (4, 776), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3437
{"vcfux", VX (4, 778), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
arch/powerpc/xmon/ppc-opc.c
3438
{"vcuxwfp", VX (4, 778), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
arch/powerpc/xmon/ppc-opc.c
3440
{"vspltisb", VX (4, 780), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
arch/powerpc/xmon/ppc-opc.c
3444
{"vpkpx", VX (4, 782), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3474
{"vaddshs", VX (4, 832), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3476
{"vminsh", VX (4, 834), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3477
{"vsrah", VX (4, 836), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3478
{"vcmpgtsh", VXR(4, 838,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3479
{"vmulesh", VX (4, 840), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3480
{"vcfsx", VX (4, 842), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
arch/powerpc/xmon/ppc-opc.c
3481
{"vcsxwfp", VX (4, 842), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
arch/powerpc/xmon/ppc-opc.c
3482
{"vspltish", VX (4, 844), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
arch/powerpc/xmon/ppc-opc.c
3484
{"vupkhpx", VX (4, 846), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3491
{"vaddsws", VX (4, 896), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3492
{"vminsw", VX (4, 898), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3493
{"vsraw", VX (4, 900), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3494
{"vcmpgtsw", VXR(4, 902,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3496
{"vctuxs", VX (4, 906), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
arch/powerpc/xmon/ppc-opc.c
3497
{"vcfpuxws", VX (4, 906), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
arch/powerpc/xmon/ppc-opc.c
3498
{"vspltisw", VX (4, 908), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
arch/powerpc/xmon/ppc-opc.c
3504
{"vcmpbfp", VXR(4, 966,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3506
{"vctsxs", VX (4, 970), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
arch/powerpc/xmon/ppc-opc.c
3507
{"vcfpsxws", VX (4, 970), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
arch/powerpc/xmon/ppc-opc.c
3509
{"vupklpx", VX (4, 974), VXVA_MASK, PPCVEC, 0, {VD, VB}},
arch/powerpc/xmon/ppc-opc.c
3514
{"vsububm", VX (4,1024), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3516
{"vavgub", VX (4,1026), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3519
{"vand", VX (4,1028), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3520
{"vcmpequb.", VXR(4, 6,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3528
{"vmaxfp", VX (4,1034), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3531
{"vslo", VX (4,1036), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3546
{"vsubuhm", VX (4,1088), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3548
{"vavguh", VX (4,1090), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3550
{"vandc", VX (4,1092), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3551
{"vcmpequh.", VXR(4, 70,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3558
{"vminfp", VX (4,1098), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3560
{"vsro", VX (4,1100), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3583
{"vsubuwm", VX (4,1152), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3585
{"vavguw", VX (4,1154), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3587
{"vmr", VX (4,1156), VX_MASK, PPCVEC, 0, {VD, VA, VBA}},
arch/powerpc/xmon/ppc-opc.c
3588
{"vor", VX (4,1156), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3591
{"vcmpequw.", VXR(4, 134,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3605
{"vxor", VX (4,1220), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3607
{"vcmpeqfp.", VXR(4, 198,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3628
{"vavgsb", VX (4,1282), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3631
{"vnot", VX (4,1284), VX_MASK, PPCVEC, 0, {VD, VA, VBA}},
arch/powerpc/xmon/ppc-opc.c
3632
{"vnor", VX (4,1284), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3659
{"vavgsh", VX (4,1346), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3679
{"vsubcuw", VX (4,1408), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3688
{"vavgsw", VX (4,1410), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3715
{"vcmpgefp.", VXR(4, 454,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3731
{"vsububs", VX (4,1536), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3748
{"mfvscr", VX (4,1540), VXVAVB_MASK, PPCVEC, 0, {VD}},
arch/powerpc/xmon/ppc-opc.c
3749
{"vcmpgtub.", VXR(4, 518,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3752
{"vsum4ubs", VX (4,1544), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3754
{"vsubuhs", VX (4,1600), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3755
{"mtvscr", VX (4,1604), VXVDVA_MASK, PPCVEC, 0, {VB}},
arch/powerpc/xmon/ppc-opc.c
3756
{"vcmpgtuh.", VXR(4, 582,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3757
{"vsum4shs", VX (4,1608), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3762
{"vsubuws", VX (4,1664), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3765
{"vcmpgtuw.", VXR(4, 646,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3768
{"vsum2sws", VX (4,1672), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3773
{"vcmpgtfp.", VXR(4, 710,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3778
{"vsubsbs", VX (4,1792), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3782
{"vcmpgtsb.", VXR(4, 774,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3785
{"vsum4sbs", VX (4,1800), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3789
{"vsubshs", VX (4,1856), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3793
{"vcmpgtsh.", VXR(4, 838,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3801
{"vsubsws", VX (4,1920), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3804
{"vcmpgtsw.", VXR(4, 902,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3807
{"vsumsws", VX (4,1928), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
3814
{"vcmpbfp.", VXR(4, 966,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
4694
{"lvsl", X(31,6), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4695
{"lvebx", X(31,7), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4768
{"lvsr", X(31,38), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4769
{"lvehx", X(31,39), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4776
{"lvewx", X(31,71), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4859
{"lvx", X(31,103), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4897
{"stvebx", X(31,135), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4949
{"stvehx", X(31,167), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4981
{"stvewx", X(31,199), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5021
{"stvx", X(31,231), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5236
{"mfvrsave", XSPR(31,339,256), XSPR_MASK, PPCVEC, 0, {RT}},
arch/powerpc/xmon/ppc-opc.c
5400
{"dst", XDSS(31,342,0), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}},
arch/powerpc/xmon/ppc-opc.c
5404
{"lvxl", X(31,359), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5422
{"dstst", XDSS(31,374,0), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}},
arch/powerpc/xmon/ppc-opc.c
5592
{"mtvrsave", XSPR(31,467,256), XSPR_MASK, PPCVEC, 0, {RS}},
arch/powerpc/xmon/ppc-opc.c
5729
{"stvxl", X(31,487), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6072
{"dss", XDSS(31,822,0), XDSS_MASK, PPCVEC, 0, {STRM}},
arch/powerpc/xmon/ppc-opc.c
6274
{"dstt", XDSS(31,342,1), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}},
arch/powerpc/xmon/ppc-opc.c
6275
{"dststt", XDSS(31,374,1), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}},
arch/powerpc/xmon/ppc-opc.c
6276
{"dssall", XDSS(31,822,1), XDSS_MASK, PPCVEC, 0, {0}},