PPC750
{"mfummcr0", XSPR(31,339,936), XSPR_MASK, PPC750, 0, {RT}},
{"mfupmc1", XSPR(31,339,937), XSPR_MASK, PPC750, 0, {RT}},
{"mfupmc2", XSPR(31,339,938), XSPR_MASK, PPC750, 0, {RT}},
{"mfusia", XSPR(31,339,939), XSPR_MASK, PPC750, 0, {RT}},
{"mfummcr1", XSPR(31,339,940), XSPR_MASK, PPC750, 0, {RT}},
{"mfupmc3", XSPR(31,339,941), XSPR_MASK, PPC750, 0, {RT}},
{"mfupmc4", XSPR(31,339,942), XSPR_MASK, PPC750, 0, {RT}},
{"mfmmcr0", XSPR(31,339,952), XSPR_MASK, PPC750, 0, {RT}},
{"mfpmc1", XSPR(31,339,953), XSPR_MASK, PPC750, 0, {RT}},
{"mfpmc2", XSPR(31,339,954), XSPR_MASK, PPC750, 0, {RT}},
{"mfsia", XSPR(31,339,955), XSPR_MASK, PPC750, 0, {RT}},
{"mfmmcr1", XSPR(31,339,956), XSPR_MASK, PPC750, 0, {RT}},
{"mfpmc3", XSPR(31,339,957), XSPR_MASK, PPC750, 0, {RT}},
{"mfpmc4", XSPR(31,339,958), XSPR_MASK, PPC750, 0, {RT}},
{"mfl2cr", XSPR(31,339,1017), XSPR_MASK, PPC750, 0, {RT}},
{"mfictc", XSPR(31,339,1019), XSPR_MASK, PPC750, 0, {RT}},
{"mfthrm1", XSPR(31,339,1020), XSPR_MASK, PPC750, 0, {RT}},
{"mfthrm2", XSPR(31,339,1021), XSPR_MASK, PPC750, 0, {RT}},
{"mfthrm3", XSPR(31,339,1022), XSPR_MASK, PPC750, 0, {RT}},
{"mtummcr0", XSPR(31,467,936), XSPR_MASK, PPC750, 0, {RS}},
{"mtupmc1", XSPR(31,467,937), XSPR_MASK, PPC750, 0, {RS}},
{"mtupmc2", XSPR(31,467,938), XSPR_MASK, PPC750, 0, {RS}},
{"mtusia", XSPR(31,467,939), XSPR_MASK, PPC750, 0, {RS}},
{"mtummcr1", XSPR(31,467,940), XSPR_MASK, PPC750, 0, {RS}},
{"mtupmc3", XSPR(31,467,941), XSPR_MASK, PPC750, 0, {RS}},
{"mtupmc4", XSPR(31,467,942), XSPR_MASK, PPC750, 0, {RS}},
{"mtmmcr0", XSPR(31,467,952), XSPR_MASK, PPC750, 0, {RS}},
{"mtpmc1", XSPR(31,467,953), XSPR_MASK, PPC750, 0, {RS}},
{"mtpmc2", XSPR(31,467,954), XSPR_MASK, PPC750, 0, {RS}},
{"mtsia", XSPR(31,467,955), XSPR_MASK, PPC750, 0, {RS}},
{"mtmmcr1", XSPR(31,467,956), XSPR_MASK, PPC750, 0, {RS}},
{"mtpmc3", XSPR(31,467,957), XSPR_MASK, PPC750, 0, {RS}},
{"mtpmc4", XSPR(31,467,958), XSPR_MASK, PPC750, 0, {RS}},
{"mtl2cr", XSPR(31,467,1017), XSPR_MASK, PPC750, 0, {RS}},
{"mtictc", XSPR(31,467,1019), XSPR_MASK, PPC750, 0, {RS}},
{"mtthrm1", XSPR(31,467,1020), XSPR_MASK, PPC750, 0, {RS}},
{"mtthrm2", XSPR(31,467,1021), XSPR_MASK, PPC750, 0, {RS}},
{"mtthrm3", XSPR(31,467,1022), XSPR_MASK, PPC750, 0, {RS}},