PPC403
{"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300|PPCA2|PPC476, PPCVLE, {0}},
{"dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440|TITAN, 0, {RA, RS, RB}},
{"dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440|TITAN, 0, {RA, RS, RB}},
{"wrtee", X(31,131), XRARB_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RS}},
{"wrteei", X(31,163), XE_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {E}},
{"icbt", X(31,262), XRT_MASK, PPC403, 0, {RA, RB}},
{"mfexisr", XSPR(31,323, 64), XSPR_MASK, PPC403, 0, {RT}},
{"mfexier", XSPR(31,323, 66), XSPR_MASK, PPC403, 0, {RT}},
{"mfbr0", XSPR(31,323,128), XSPR_MASK, PPC403, 0, {RT}},
{"mfbr1", XSPR(31,323,129), XSPR_MASK, PPC403, 0, {RT}},
{"mfbr2", XSPR(31,323,130), XSPR_MASK, PPC403, 0, {RT}},
{"mfbr3", XSPR(31,323,131), XSPR_MASK, PPC403, 0, {RT}},
{"mfbr4", XSPR(31,323,132), XSPR_MASK, PPC403, 0, {RT}},
{"mfbr5", XSPR(31,323,133), XSPR_MASK, PPC403, 0, {RT}},
{"mfbr6", XSPR(31,323,134), XSPR_MASK, PPC403, 0, {RT}},
{"mfbr7", XSPR(31,323,135), XSPR_MASK, PPC403, 0, {RT}},
{"mfbear", XSPR(31,323,144), XSPR_MASK, PPC403, 0, {RT}},
{"mfbesr", XSPR(31,323,145), XSPR_MASK, PPC403, 0, {RT}},
{"mfiocr", XSPR(31,323,160), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmacr0", XSPR(31,323,192), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmact0", XSPR(31,323,193), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmada0", XSPR(31,323,194), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmasa0", XSPR(31,323,195), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmacc0", XSPR(31,323,196), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmacr1", XSPR(31,323,200), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmact1", XSPR(31,323,201), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmada1", XSPR(31,323,202), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmasa1", XSPR(31,323,203), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmacc1", XSPR(31,323,204), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmacr2", XSPR(31,323,208), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmact2", XSPR(31,323,209), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmada2", XSPR(31,323,210), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmasa2", XSPR(31,323,211), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmacc2", XSPR(31,323,212), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmacr3", XSPR(31,323,216), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmact3", XSPR(31,323,217), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmada3", XSPR(31,323,218), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmasa3", XSPR(31,323,219), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmacc3", XSPR(31,323,220), XSPR_MASK, PPC403, 0, {RT}},
{"mfdmasr", XSPR(31,323,224), XSPR_MASK, PPC403, 0, {RT}},
{"mfdcr", X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {RT, SPR}},
{"mfzpr", XSPR(31,339,944), XSPR_MASK, PPC403, 0, {RT}},
{"mfpid", XSPR(31,339,945), XSPR_MASK, PPC403, 0, {RT}},
{"mfsgr", XSPR(31,339,953), XSPR_MASK, PPC403, 0, {RT}},
{"mfdcwr", XSPR(31,339,954), XSPR_MASK, PPC403, 0, {RT}},
{"mficdbdr", XSPR(31,339,979), XSPR_MASK, PPC403|TITAN, 0, {RT}},
{"mfesr", XSPR(31,339,980), XSPR_MASK, PPC403, 0, {RT}},
{"mfdear", XSPR(31,339,981), XSPR_MASK, PPC403, 0, {RT}},
{"mfevpr", XSPR(31,339,982), XSPR_MASK, PPC403, 0, {RT}},
{"mfcdbcr", XSPR(31,339,983), XSPR_MASK, PPC403, 0, {RT}},
{"mftsr", XSPR(31,339,984), XSPR_MASK, PPC403, 0, {RT}},
{"mftcr", XSPR(31,339,986), XSPR_MASK, PPC403, 0, {RT}},
{"mfpit", XSPR(31,339,987), XSPR_MASK, PPC403, 0, {RT}},
{"mftbhi", XSPR(31,339,988), XSPR_MASK, PPC403, 0, {RT}},
{"mftblo", XSPR(31,339,989), XSPR_MASK, PPC403, 0, {RT}},
{"mfsrr2", XSPR(31,339,990), XSPR_MASK, PPC403, 0, {RT}},
{"mfsrr3", XSPR(31,339,991), XSPR_MASK, PPC403, 0, {RT}},
{"mfdbsr", XSPR(31,339,1008), XSPR_MASK, PPC403, 0, {RT}},
{"mfiac1", XSPR(31,339,1012), XSPR_MASK, PPC403, 0, {RT}},
{"mfiac2", XSPR(31,339,1013), XSPR_MASK, PPC403, 0, {RT}},
{"mfdac1", XSPR(31,339,1014), XSPR_MASK, PPC403, 0, {RT}},
{"mfdac2", XSPR(31,339,1015), XSPR_MASK, PPC403, 0, {RT}},
{"mfdccr", XSPR(31,339,1018), XSPR_MASK, PPC403, 0, {RT}},
{"mficcr", XSPR(31,339,1019), XSPR_MASK, PPC403, 0, {RT}},
{"mfpbl1", XSPR(31,339,1020), XSPR_MASK, PPC403, 0, {RT}},
{"mfpbu1", XSPR(31,339,1021), XSPR_MASK, PPC403, 0, {RT}},
{"mfpbl2", XSPR(31,339,1022), XSPR_MASK, PPC403, 0, {RT}},
{"mfpbu2", XSPR(31,339,1023), XSPR_MASK, PPC403, 0, {RT}},
{"mtexisr", XSPR(31,451, 64), XSPR_MASK, PPC403, 0, {RS}},
{"mtexier", XSPR(31,451, 66), XSPR_MASK, PPC403, 0, {RS}},
{"mtbr0", XSPR(31,451,128), XSPR_MASK, PPC403, 0, {RS}},
{"mtbr1", XSPR(31,451,129), XSPR_MASK, PPC403, 0, {RS}},
{"mtbr2", XSPR(31,451,130), XSPR_MASK, PPC403, 0, {RS}},
{"mtbr3", XSPR(31,451,131), XSPR_MASK, PPC403, 0, {RS}},
{"mtbr4", XSPR(31,451,132), XSPR_MASK, PPC403, 0, {RS}},
{"mtbr5", XSPR(31,451,133), XSPR_MASK, PPC403, 0, {RS}},
{"mtbr6", XSPR(31,451,134), XSPR_MASK, PPC403, 0, {RS}},
{"mtbr7", XSPR(31,451,135), XSPR_MASK, PPC403, 0, {RS}},
{"mtbear", XSPR(31,451,144), XSPR_MASK, PPC403, 0, {RS}},
{"mtbesr", XSPR(31,451,145), XSPR_MASK, PPC403, 0, {RS}},
{"mtiocr", XSPR(31,451,160), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmacr0", XSPR(31,451,192), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmact0", XSPR(31,451,193), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmada0", XSPR(31,451,194), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmasa0", XSPR(31,451,195), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmacc0", XSPR(31,451,196), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmacr1", XSPR(31,451,200), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmact1", XSPR(31,451,201), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmada1", XSPR(31,451,202), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmasa1", XSPR(31,451,203), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmacc1", XSPR(31,451,204), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmacr2", XSPR(31,451,208), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmact2", XSPR(31,451,209), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmada2", XSPR(31,451,210), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmasa2", XSPR(31,451,211), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmacc2", XSPR(31,451,212), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmacr3", XSPR(31,451,216), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmact3", XSPR(31,451,217), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmada3", XSPR(31,451,218), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmasa3", XSPR(31,451,219), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmacc3", XSPR(31,451,220), XSPR_MASK, PPC403, 0, {RS}},
{"mtdmasr", XSPR(31,451,224), XSPR_MASK, PPC403, 0, {RS}},
{"mtdcr", X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {SPR, RS}},
{"dccci", X(31,454), XRT_MASK, PPC403|PPC440|TITAN|PPCA2, 0, {RAOPT, RBOPT}},
{"mtzpr", XSPR(31,467,944), XSPR_MASK, PPC403, 0, {RS}},
{"mtpid", XSPR(31,467,945), XSPR_MASK, PPC403, 0, {RS}},
{"mtsgr", XSPR(31,467,953), XSPR_MASK, PPC403, 0, {RS}},
{"mtdcwr", XSPR(31,467,954), XSPR_MASK, PPC403, 0, {RS}},
{"mticdbdr", XSPR(31,467,979), XSPR_MASK, PPC403, 0, {RS}},
{"mtesr", XSPR(31,467,980), XSPR_MASK, PPC403, 0, {RS}},
{"mtdear", XSPR(31,467,981), XSPR_MASK, PPC403, 0, {RS}},
{"mtevpr", XSPR(31,467,982), XSPR_MASK, PPC403, 0, {RS}},
{"mtcdbcr", XSPR(31,467,983), XSPR_MASK, PPC403, 0, {RS}},
{"mttsr", XSPR(31,467,984), XSPR_MASK, PPC403, 0, {RS}},
{"mttcr", XSPR(31,467,986), XSPR_MASK, PPC403, 0, {RS}},
{"mtpit", XSPR(31,467,987), XSPR_MASK, PPC403, 0, {RS}},
{"mttbhi", XSPR(31,467,988), XSPR_MASK, PPC403, 0, {RS}},
{"mttblo", XSPR(31,467,989), XSPR_MASK, PPC403, 0, {RS}},
{"mtsrr2", XSPR(31,467,990), XSPR_MASK, PPC403, 0, {RS}},
{"mtsrr3", XSPR(31,467,991), XSPR_MASK, PPC403, 0, {RS}},
{"mtdbsr", XSPR(31,467,1008), XSPR_MASK, PPC403, 0, {RS}},
{"mtiac1", XSPR(31,467,1012), XSPR_MASK, PPC403, 0, {RS}},
{"mtiac2", XSPR(31,467,1013), XSPR_MASK, PPC403, 0, {RS}},
{"mtdac1", XSPR(31,467,1014), XSPR_MASK, PPC403, 0, {RS}},
{"mtdac2", XSPR(31,467,1015), XSPR_MASK, PPC403, 0, {RS}},
{"mtdccr", XSPR(31,467,1018), XSPR_MASK, PPC403, 0, {RS}},
{"mticcr", XSPR(31,467,1019), XSPR_MASK, PPC403, 0, {RS}},
{"mtpbl1", XSPR(31,467,1020), XSPR_MASK, PPC403, 0, {RS}},
{"mtpbu1", XSPR(31,467,1021), XSPR_MASK, PPC403, 0, {RS}},
{"mtpbl2", XSPR(31,467,1022), XSPR_MASK, PPC403, 0, {RS}},
{"mtpbu2", XSPR(31,467,1023), XSPR_MASK, PPC403, 0, {RS}},
{"dcread", X(31,486), X_MASK, PPC403|PPC440, PPCA2|PPC476, {RT, RA0, RB}},
{"tlbsx", XRC(31,914,0), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RTO, RA0, RB}},
{"tlbsx.", XRC(31,914,1), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RTO, RA0, RB}},
{"tlbrehi", XTLB(31,946,0), XTLB_MASK, PPC403, PPCA2, {RT, RA}},
{"tlbrelo", XTLB(31,946,1), XTLB_MASK, PPC403, PPCA2, {RT, RA}},
{"tlbre", X(31,946), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RSO, RAOPT, SHO}},
{"iccci", X(31,966), XRT_MASK, PPC403|PPC440|TITAN|PPCA2, 0, {RAOPT, RBOPT}},
{"tlbld", X(31,978), XRTRA_MASK, PPC, PPC403|BOOKE|PPCA2|PPC476, {RB}},
{"tlbwehi", XTLB(31,978,0), XTLB_MASK, PPC403, 0, {RT, RA}},
{"tlbwelo", XTLB(31,978,1), XTLB_MASK, PPC403, 0, {RT, RA}},
{"tlbwe", X(31,978), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RSO, RAOPT, SHO}},
{"icread", X(31,998), XRT_MASK, PPC403|PPC440|PPC476|TITAN, 0, {RA0, RB}},