POSR_PLL3_LOCK
CCU_PLL_DEFINE(pll3, pll3_rate_tbl, APBS_PLL3_SWCR1, APBS_PLL3_SWCR3, MPMU_POSR, POSR_PLL3_LOCK,
MPMU_POSR, POSR_PLL3_LOCK, CLK_SET_RATE_GATE);