POSR_PLL1_LOCK
CCU_PLL_DEFINE(pll1, pll1_rate_tbl, APBS_PLL1_SWCR1, APBS_PLL1_SWCR3, MPMU_POSR, POSR_PLL1_LOCK,
MPMU_POSR, POSR_PLL1_LOCK, CLK_SET_RATE_GATE);