drivers/gpu/drm/amd/display/dc/dce/dce_aux.c

219

REG_UPDATE(AUX_INTERRUPT_CONTROL, AUX_SW_DONE_ACK, 1);

drivers/gpu/drm/amd/display/dc/dce/dce_aux.h

107

AUX_SF(AUX_INTERRUPT_CONTROL, AUX_SW_DONE_ACK, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_aux.h

131

AUX_SF(AUX_INTERRUPT_CONTROL, AUX_SW_DONE_ACK, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_aux.h

156

AUX_SF(DP_AUX0_AUX_INTERRUPT_CONTROL, AUX_SW_DONE_ACK, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_aux.h

182

AUX_SF(DP_AUX0_AUX_INTERRUPT_CONTROL, AUX_SW_DONE_ACK, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_aux.h

208

AUX_SF(DP_AUX0_AUX_INTERRUPT_CONTROL, AUX_SW_DONE_ACK, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_aux.h

81

type AUX_SW_DONE_ACK;\

drivers/gpu/drm/radeon/radeon_dp_auxch.c

145

WREG32(AUX_SW_INTERRUPT_CONTROL + aux_offset[instance], AUX_SW_DONE_ACK);

drivers/gpu/drm/radeon/radeon_dp_auxch.c

193

WREG32(AUX_SW_INTERRUPT_CONTROL + aux_offset[instance], AUX_SW_DONE_ACK);