AUX_SW_CONTROL
REG_UPDATE_2(AUX_SW_CONTROL,
REG_UPDATE(AUX_SW_CONTROL, AUX_SW_GO, 1);
AUX_SF(AUX_SW_CONTROL, AUX_SW_GO, mask_sh),\
AUX_SF(AUX_SW_CONTROL, AUX_SW_START_DELAY, mask_sh),\
AUX_SF(AUX_SW_CONTROL, AUX_SW_WR_BYTES, mask_sh),\
AUX_SF(AUX_SW_CONTROL, AUX_SW_GO, mask_sh),\
SRI(AUX_SW_CONTROL, DP_AUX, id), \
SRI(AUX_SW_CONTROL, DP_AUX, id), \
uint32_t AUX_SW_CONTROL;
AUX_SF(AUX_SW_CONTROL, AUX_SW_START_DELAY, mask_sh),\
AUX_SF(AUX_SW_CONTROL, AUX_SW_WR_BYTES, mask_sh),\
SRI_ARR(AUX_SW_DATA, DP_AUX, id), SRI_ARR(AUX_SW_CONTROL, DP_AUX, id), \
WREG32(AUX_SW_CONTROL + aux_offset[instance],
WREG32(AUX_SW_CONTROL + aux_offset[instance],
WREG32(AUX_SW_CONTROL + aux_offset[instance],