PORT_SCR_CTL
writel(tmp, mmio + PORT_SCR_CTL + PORT_BASE + PORT_OFFSET * i);
[SCR_CONTROL] = PORT_SCR_CTL,
scontrol = readl(port_mmio + PORT_SCR_CTL);
writel(scontrol, port_mmio + PORT_SCR_CTL);
writel(readl(port->mmio + PORT_SCR_CTL) |
1, port->mmio + PORT_SCR_CTL);
readl(port->mmio + PORT_SCR_CTL);
writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
port->mmio + PORT_SCR_CTL);
readl(port->mmio + PORT_SCR_CTL);
regval = readl(ctrl_reg + PORT_SCR_CTL);
writel(regval, ctrl_reg + PORT_SCR_CTL);