PORT_CTRL
.setscl = { 0x08, PORT_CTRL, 0 },
.setsda = { 0x02, PORT_CTRL, 1 },
.setscl = { 0x08, PORT_CTRL, 1 },
write_mem32(dc->port[PORT_CTRL].ul_addr[0], (u32 *)&ctrl, 2);
enable_transmit_ul(PORT_CTRL, get_dc_by_tty(tty));
enable_transmit_ul(PORT_CTRL, get_dc_by_tty(tty));
dc->port[PORT_CTRL].dl_addr[CH_A] =
dc->port[PORT_CTRL].dl_size[CH_A] =
dc->port[PORT_CTRL].ul_addr[CH_A] =
dc->port[PORT_CTRL].ul_size[CH_A] =
read_mem32((u32 *) &ctrl_dl, dc->port[PORT_CTRL].dl_addr[CH_A], 2);
write_mem32(dc->port[PORT_CTRL].ul_addr[0], \