arch/powerpc/perf/generic-compat-pmu.c

107

GENERIC_EVENT_ATTR(cache-misses, PM_LD_MISS_L1);

arch/powerpc/perf/generic-compat-pmu.c

109

CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1);

arch/powerpc/perf/generic-compat-pmu.c

122

GENERIC_EVENT_PTR(PM_LD_MISS_L1),

arch/powerpc/perf/generic-compat-pmu.c

123

CACHE_EVENT_PTR(PM_LD_MISS_L1),

arch/powerpc/perf/generic-compat-pmu.c

175

[PERF_COUNT_HW_CACHE_MISSES] = PM_LD_MISS_L1,

arch/powerpc/perf/generic-compat-pmu.c

189

[ C(RESULT_MISS) ] = PM_LD_MISS_L1,

arch/powerpc/perf/power10-events-list.h

25

EVENT(PM_LD_MISS_L1, 0x3e054);

arch/powerpc/perf/power10-pmu.c

126

GENERIC_EVENT_ATTR(cache-misses, PM_LD_MISS_L1);

arch/powerpc/perf/power10-pmu.c

133

CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1);

arch/powerpc/perf/power10-pmu.c

156

GENERIC_EVENT_PTR(PM_LD_MISS_L1),

arch/powerpc/perf/power10-pmu.c

159

CACHE_EVENT_PTR(PM_LD_MISS_L1),

arch/powerpc/perf/power10-pmu.c

184

CACHE_EVENT_PTR(PM_LD_MISS_L1),

arch/powerpc/perf/power10-pmu.c

290

[PERF_COUNT_HW_CACHE_MISSES] = PM_LD_MISS_L1,

arch/powerpc/perf/power10-pmu.c

362

[C(RESULT_MISS)] = PM_LD_MISS_L1,

arch/powerpc/perf/power10-pmu.c

463

[C(RESULT_MISS)] = PM_LD_MISS_L1,

arch/powerpc/perf/power7-events-list.h

248

EVENT(PM_LD_MISS_L1, 0x400f0)

arch/powerpc/perf/power7-pmu.c

327

[PERF_COUNT_HW_CACHE_MISSES] = PM_LD_MISS_L1,

arch/powerpc/perf/power7-pmu.c

383

GENERIC_EVENT_ATTR(cache-misses, PM_LD_MISS_L1);

arch/powerpc/perf/power7-pmu.c

399

GENERIC_EVENT_PTR(PM_LD_MISS_L1),

arch/powerpc/perf/power8-events-list.h

21

EVENT(PM_LD_MISS_L1, 0x3e054)

arch/powerpc/perf/power8-pmu.c

108

{ PM_LD_MISS_L1, PM_LD_MISS_L1_ALT },

arch/powerpc/perf/power8-pmu.c

130

GENERIC_EVENT_ATTR(cache-misses, PM_LD_MISS_L1);

arch/powerpc/perf/power8-pmu.c

133

CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1);

arch/powerpc/perf/power8-pmu.c

161

GENERIC_EVENT_PTR(PM_LD_MISS_L1),

arch/powerpc/perf/power8-pmu.c

164

CACHE_EVENT_PTR(PM_LD_MISS_L1),

arch/powerpc/perf/power8-pmu.c

214

[PERF_COUNT_HW_CACHE_MISSES] = PM_LD_MISS_L1,

arch/powerpc/perf/power8-pmu.c

270

[ C(RESULT_MISS) ] = PM_LD_MISS_L1,

arch/powerpc/perf/power9-events-list.h

22

EVENT(PM_LD_MISS_L1, 0x3e054)

arch/powerpc/perf/power9-pmu.c

139

{ PM_LD_MISS_L1, PM_LD_MISS_L1_ALT },

tools/testing/selftests/powerpc/pmu/event_code_tests/event_alternatives_tests_p9.c

84

event_init(&leader, PM_LD_MISS_L1);