PMUCRU_RESET_OFFSET
PMUCRU_RESET_OFFSET(SRST_H_PMU_BIU, 0, 0),
PMUCRU_RESET_OFFSET(SRST_P_PMU_GPIO0, 0, 7),
PMUCRU_RESET_OFFSET(SRST_DB_PMU_GPIO0, 0, 8),
PMUCRU_RESET_OFFSET(SRST_P_PMU_HP_TIMER, 0, 10),
PMUCRU_RESET_OFFSET(SRST_PMU_HP_TIMER, 0, 11),
PMUCRU_RESET_OFFSET(SRST_PMU_32K_HP_TIMER, 0, 12),
PMUCRU_RESET_OFFSET(SRST_P_PWM1, 1, 0),
PMUCRU_RESET_OFFSET(SRST_PWM1, 1, 1),
PMUCRU_RESET_OFFSET(SRST_P_I2C2, 1, 2),
PMUCRU_RESET_OFFSET(SRST_I2C2, 1, 3),
PMUCRU_RESET_OFFSET(SRST_P_UART0, 1, 4),
PMUCRU_RESET_OFFSET(SRST_S_UART0, 1, 5),
PMUCRU_RESET_OFFSET(SRST_P_RCOSC_CTRL, 2, 0),
PMUCRU_RESET_OFFSET(SRST_REF_RCOSC_CTRL, 2, 2),
PMUCRU_RESET_OFFSET(SRST_P_IOC_PMUIO0, 2, 3),
PMUCRU_RESET_OFFSET(SRST_P_CRU_PMU, 2, 4),
PMUCRU_RESET_OFFSET(SRST_P_PMU_GRF, 2, 5),
PMUCRU_RESET_OFFSET(SRST_PREROLL, 2, 7),
PMUCRU_RESET_OFFSET(SRST_PREROLL_32K, 2, 8),
PMUCRU_RESET_OFFSET(SRST_H_PMU_SRAM, 2, 9),
PMUCRU_RESET_OFFSET(SRST_P_WDT_LPMCU, 3, 0),
PMUCRU_RESET_OFFSET(SRST_T_WDT_LPMCU, 3, 1),
PMUCRU_RESET_OFFSET(SRST_LPMCU_FULL_CLUSTER, 3, 2),
PMUCRU_RESET_OFFSET(SRST_LPMCU_PWUP, 3, 3),
PMUCRU_RESET_OFFSET(SRST_LPMCU_ONLY_CORE, 3, 4),
PMUCRU_RESET_OFFSET(SRST_T_LPMCU_JTAG, 3, 5),
PMUCRU_RESET_OFFSET(SRST_P_LPMCU_MAILBOX, 3, 6),