PLANE_SURF
intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id),
intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id),
error->surf = intel_de_read(display, PLANE_SURF(crtc->pipe, plane->id));
intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id),
intel_de_write_fw(display, PLANE_SURF(plane->pipe, plane->id),
base = intel_de_read(display, PLANE_SURF(pipe, plane_id)) & PLANE_SURF_ADDR_MASK;
intel_de_write(display, PLANE_SURF(pipe, plane_id), plane_state->surf);
intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id), 0);
intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id), 0);
MMIO_D(PLANE_SURF(PIPE_A, 2));
MMIO_D(PLANE_SURF(PIPE_B, 2));
MMIO_D(PLANE_SURF(PIPE_C, 2));