PLL_REF_DIV
mult = lgm_get_clk_val(pll->membase, PLL_REF_DIV(pll->reg), 0, 12);
div = lgm_get_clk_val(pll->membase, PLL_REF_DIV(pll->reg), 18, 6);
calc_pll_cs_init_data.max_pll_ref_divider = clk_src->cs_mask->PLL_REF_DIV;
calc_pll_cs_init_data_hdmi.max_pll_ref_divider = clk_src->cs_mask->PLL_REF_DIV;
type PLL_REF_DIV; \
CS_SF(PLL_REF_DIV, PLL_REF_DIV, mask_sh)
chipone_writeb(icn, PLL_REF_DIV, ref_div);
u8 pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par);
M = pll_regs[PLL_REF_DIV];
pll->ct.pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par);
pll->ct.pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par);
aty_st_pll_ct(PLL_REF_DIV, pll->ct.pll_ref_div, par);