PLL_OFF_TEST_CTL_U
[PLL_OFF_TEST_CTL_U] = 0x20,
[PLL_OFF_TEST_CTL_U] = 0x20,
[PLL_OFF_TEST_CTL_U] = 0x28,
[PLL_OFF_TEST_CTL_U] = 0x1c,
[PLL_OFF_TEST_CTL_U] = 0x20,
[PLL_OFF_TEST_CTL_U] = 0x30,
[PLL_OFF_TEST_CTL_U] = 0x30,
[PLL_OFF_TEST_CTL_U] = 0x30,
[PLL_OFF_TEST_CTL_U] = 0x30,
[PLL_OFF_TEST_CTL_U] = 0x2c,
[PLL_OFF_TEST_CTL_U] = 0x30,
[PLL_OFF_TEST_CTL_U] = 0x14,
[PLL_OFF_TEST_CTL_U] = 0x14,
[PLL_OFF_TEST_CTL_U] = 0x34,
[PLL_OFF_TEST_CTL_U] = 0x18,
[PLL_OFF_TEST_CTL_U] = 0x28,
[PLL_OFF_TEST_CTL_U] = 0x10,
#define PLL_TEST_CTL_U(p) ((p)->offset + (p)->regs[PLL_OFF_TEST_CTL_U])
[PLL_OFF_TEST_CTL_U] = 0x20,
[PLL_OFF_TEST_CTL_U] = 0x20,
[PLL_OFF_TEST_CTL_U] = 0x34,
[PLL_OFF_TEST_CTL_U] = 0x24,
[PLL_OFF_TEST_CTL_U] = 0x28,