PLL_OFF_CONFIG_CTL_U1
[PLL_OFF_CONFIG_CTL_U1] = 0x18,
[PLL_OFF_CONFIG_CTL_U1] = 0x20,
[PLL_OFF_CONFIG_CTL_U1] = 0x18,
[PLL_OFF_CONFIG_CTL_U1] = 0x28,
[PLL_OFF_CONFIG_CTL_U1] = 0x28,
[PLL_OFF_CONFIG_CTL_U1] = 0x24,
[PLL_OFF_CONFIG_CTL_U1] = 0x28,
[PLL_OFF_CONFIG_CTL_U1] = 0x24,
[PLL_OFF_CONFIG_CTL_U1] = 0x24,
[PLL_OFF_CONFIG_CTL_U1] = 0x1c,
#define PLL_CONFIG_CTL_U1(p) ((p)->offset + (p)->regs[PLL_OFF_CONFIG_CTL_U1])
[PLL_OFF_CONFIG_CTL_U1] = 0x20,